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LT1676CS8 Datasheet(PDF) 7 Page - Linear Technology |
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LT1676CS8 Datasheet(HTML) 7 Page - Linear Technology |
7 / 16 page 7 LT1676 OPERATIO Please refer to the High dV/dt Mode Timing Diagram. A typical oscillator cycle is as follows: The logic section first generates an SWDR signal that powers up the current comparator and allows it time to settle. About 1 µslater,the SWON signal is asserted and the BOOST signal is pulsed for a few hundred nanoseconds. After a short delay, the VSW pin slews rapidly to VIN. Later, after the peak switch current indicated by the control voltage VC has been reached (current mode control), the SWON and SWDR signals are turned off, and SWOFF is pulsed for several hundred nanoseconds. The use of an explicit turn-off device, i.e., Q5, improves turn-off response time and thus aids both controllability and efficiency. The system as previously described handles heavy loads (continuous mode) at good efficiency, but it is actually counterproductive for light loads. The method of jam- ming charge into the PNP bases makes it difficult to turn them off rapidly and achieve the very short switch ON times required by light loads in discontinuous mode. Furthermore, the high leading edge dV/dt rate similarly adversely affects light load controllability. The solution is to employ a “boost comparator” whose inputs are the VC control voltage and a fixed internal threshold reference, VTH. (Remember that in a current mode switching topology, the VC voltage determines the peak switch current.) When the VC signal is above VTH, the previously described “high dV/dt” action is performed. When the VC signal is below VTH, the boost pulses are absent, as can be seen in the Low dV/dt Mode Timing Diagram. Now the DC current, activated by the SWON signal alone, drives Q4 and this transistor drives Q1 by itself. The absence of a boost pulse, plus the lack of a second NPN driver, result in a much lower slew rate which aids light load controllability. A further aid to overall efficiency is provided by the specialized bias regulator circuit, which has a pair of inputs, VIN and VCC. The VCC pin is normally connected to the switching supply output. During start-up conditions, the LT1676 powers itself directly from VIN. However, after the switching supply output voltage reaches about 2.9V, the bias regulator uses this supply as its input. Previous generation Buck controller ICs without this provision typically required hundreds of milliwatts of quiescent power when operating at high input voltage. This both degraded efficiency and limited available output current due to internal heating. APPLICATIONS INFORMATION Selecting a Power Inductor There are several parameters to consider when selecting a power inductor. These include inductance value, peak current rating (to avoid core saturation), DC resistance, construction type, physical size, and of course, cost. In a typical application, proper inductance value is dictated by matching the discontinuous/continuous crossover point with the LT1676 internal low-to-high dV/dt threshold. This is the best compromise between maintaining control with light loads while maintaining good efficiency with heavy loads. The fixed internal dV/dt threshold has a nominal value of 1.4V, which referred to the VC pin threshold and control voltage to switch transconductance, corresponds to a peak current of about 200mA. Standard Buck con- verter theory yields the following expression for induc- tance at the discontinuous/continuous crossover: L V fI VV V OUT PK IN OUT IN = • – For example, substituting 48V, 5V, 200mA and 100kHz respectively for VIN, VOUT, IPK and f yields a value of about 220 µH. Note that the left half of this expression is indepen- dent of input voltage while the right half is only a weak function of VIN when VIN is much greater than VOUT. This means that a single inductor value will work well over a range of “high” input voltage. And although a progres- sively smaller inductor is suggested as VIN begins to approach VOUT, note that the much higher ON duty cycles under these conditions are much more forgiving with respect to controllability and efficiency issues. Therefore when a wide input voltage range must be accommodated, say 10V to 50V for 5VOUT, the user should choose an inductance value based on the maximum input voltage. |
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