7

LT1529

LT1529-3.3/LT1529-5

CC

HARA TERISTICS

A

TYPICALPERFOR

CE

PI FU CTIO S

OUTPUT (Pin 1): OUTPUT Pin. The OUTPUT pin supplies

power to the load. A minimum output capacitor of 3.3

µF is

required to prevent oscillations. Larger values will be

required to optimize transient response for large load

current deltas. See the Applications Information section

for further information on output capacitance and reverse

output characteristics.

SENSE (Pin 2): SENSE Pin. For fixed voltage versions of

the LT1529 (LT1529-3.3, LT1529-5) the SENSE pin is the

input to the error amplifier. Optimum regulation will be

obtained at the point where the SENSE pin is connected to

the output pin. For most applications the SENSE pin is

connected directly to the OUTPUT pin at the regulator. In

critical applications small voltage drops caused by the

load, which would normally degrade regulation, may be

eliminated by connecting the SENSE pin to the OUTPUT

pin at the load as shown in Figure 1 (Kelvin Sense Connec-

tion). Note that the voltage drop across the external PC

traces will add to the dropout voltage of the regulator. The

SENSE pin bias current is 15

µA at the nominal regulated

output voltage. This pin is internally clamped to – 0.6V

ADJ (Pin 2): Adjust Pin. For the LT1529 (adjustable

version) the ADJ pin is the input to the error amplifier. This

+

1

2

3

LT1529 • F01

5

4

OUTPUT

SENSE

LT1529-5

SHDN

GND

LOAD

+

Figure 1. Kelvin Sense Connection

pin has a bias current of 150nA which flows into the pin.

See Bias Current curve in the Typical Performance Char-

acteristics. The ADJ pin reference voltage is equal to 3.75V

referenced to ground.

SHDN (Pin 4): Shutdown Pin. This pin is used to put the

device into shutdown. In shutdown the output of the

device is turned off. This pin is active low. The device will

be shut down if the SHDN pin is actively pulled low. The

SHDN pin current with the pin pulled to ground will be 6

µA.

The SHDN pin is internally clamped to 7V and – 0.6V (one

logic or by open-collector logic with a pull-up resistor. The

pull-up resistor is only required to supply the leakage

current of the open-collector gate, normally several mi-

croamperes. Pull-up current must be limited to a maxi-

mum of 5mA. A curve of SHDN pin input current as a

Load Regulation

TEMPERATURE (

°C)

–50

–5

0

5

25

75

LT1529 • G28

–10

–15

–25

0

50

100

125

–20

–25

LT1529-5

LT1529-3.3

LT1529

TIME (

µs)

0

– 0.1

0.1

160

LT1529 • G30

2

– 0.2

0

0.2

3

1

40

80

120

20

180

60

100

140

200

LT1529-5 Transient Response

TIME (

µs)

0

– 0.1

0.1

800

LT1529 • G29

2

– 0.2

0

0.2

3

1

200

400

600

100

900

300

500

700

1000

LT1529-5 Transient Response