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LT1534IS Datasheet(PDF) 9 Page - Linear Technology |
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LT1534IS Datasheet(HTML) 9 Page - Linear Technology |
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9 / 16 page  9 LT1534/LT1534-1 APPLICATIONS INFORMATION If the FB pin is below 0.4V the oscillator discharge time will increase, causing the oscillation frequency to decrease by approximately 6:1. This feature helps minimize power dissipation during start-up and short-circuit conditions. Oscillator frequency is important for noise reduction in two ways: 1) the lower the oscillator frequency the lower the harmonics of waveforms are, making it easier to filter them, 2) the oscillator will control the placement of output frequency harmonics which can aid in specific problems where you might be trying to avoid a certain frequency bandwidth that is used for detection elsewhere. Oscillator Sync If a more precise frequency is desired (e.g., to accurately place harmonics) the oscillator can be synchronized to an external clock. Set the RC timing components for an oscillator frequency 10% lower than the desired sync frequency. Drive the SYNC pin with a square wave (with greater than 1.4V amplitude). The rising edge of the sync square wave will initiate clock discharge. The sync pulse should have a minimum of 0.5 µs pulse width. Be careful in synchronizing to frequencies much different from the part since the internal oscillator charge slope determines slope compensation. It would be possible to get into subharmonic oscillation if the sync doesn’t allow for the charge cycle of the capacitor to initiate slope compensation. In general, this will not be a problem until the sync frequency is greater than 1.5times the oscillator free-run frequency. Slew Rate Setting Setting the voltage and current slew rates is easy. External resistors to ground on the RVSL and RCSL pins determine the slew rates. Determining what slew rate to use is more difficult. There are several ways to approach the problem. First start by putting a 50k resistor pot with a 3.9k series resistance on each pin. In general, the next step will be to monitor the noise that you are concerned with. Be careful in measurement technique (consult AN70). Keep probe ground leads very short. Usually it will be desirable to keep the voltage and current slew resistors approximately the same. There are circum- stances where a better optimization can be found by adjusting each separately, but as these values are sepa- rated further, a loss of independence of control will occur. Starting from the lowest resistor setting adjust the pots until the noise level meets your guidelines. Note that slower slewing waveforms will dissipate more power so that efficiency will drop. You can also monitor this as you make your slew adjustment. It is possible to use a single slew setting resistor. In this case the RVSL and RCSL pins are tied together. A resistor with a value of 2k to 34k (one half the individual resistors) can then be tied from these pins to ground. Emitter Inductance A small inductance in the power ground minimizes a potential dip in the output current falling edge that can occur under fast slewing, 25nH is usually sufficient. Greater than 50nH may produce unwanted oscillations in the voltage output. The inductance can be created by wire or board trace with the equivalent of one inch of straight length. A spiral board trace will require less length. Positive Output Voltage Setting Sensing of a positive output voltage is usually done using a resistor divider from the output to the FB pin. The positive input to the error amp is connected internally to a 1.25V bandgap reference. The FB pin will regulate to this voltage. Referring to Figure 2, R1 is determined by: RR VOUT 12 125 1 =− . The FB bias current represents a small error and can usually be ignored for values of R1 ||R2 up to 10k. Figure 2 FB PIN 1534 F01 VOUT R2 R1 |
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