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LT1460ACS8-5 Datasheet(PDF) 6 Page - Linear Technology |
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LT1460ACS8-5 Datasheet(HTML) 6 Page - Linear Technology |
6 / 12 page 6 LT1460-5 APPLICATIONS INFORMATION Longer Battery Life Series references have a large advantage over older shunt style references. Shunt references require a resistor from the power supply to operate. This resistor must be chosen to supply the maximum current that can ever be demanded by the circuit being regulated. When the circuit being controlled is not operating at this maximum current, the shunt reference must always sink this current, result- ing in high dissipation and short battery life. The LT1460-5 series reference does not require a current setting resistor and can operate with any supply voltage from VOUT + 0.9V to 20V. When the circuitry being regu- lated does not demand current, the LT1460-5 reduces its dissipation and battery life is extended. If the reference is not delivering load current it dissipates less than 1mW on a 7.5V supply, yet the same configuration can deliver 20mA of load current when demanded. Capacitive Loads The LT1460-5 is designed to be stable with capacitive loads. With no capacitive load, the reference is ideal for fast settling or applications where PC board space is a premium. The test circuit shown in Figure 1 is used to measure the response time for various load currents and load capacitors. The 1V step from 5V to 4V produces a current step of 1mA or 100 µA for RL = 1k or RL = 10k. Figure 2 shows the response of the reference with no load capacitance. The reference settles to 5mV (0.1%) in less than 2 µs for a 100 µA pulse and to 0.1% in 3µs with a 1mA step. When load capacitance is greater than 0.01 µF, the reference begins to ring due to the pole formed with the output impedance. Figure 3 shows the response of the reference to a 1mA and 100 µA load with a 0.01µF load capacitor. Fast Turn-On It is recommended to add a 0.1 µF or larger input capacitor to the input pin of the LT1460-5. This helps stability with large load currents and speeds up turn-on. The LT1460-5 can start in 10 µs, but it is important to limit the dv/dt of the input. Under light load conditions and with a very fast input, internal nodes overslew and this requires finite recovery time. Figure 4 shows the result of no bypass LT1460-5 RL VOUT VGEN 1460-5 F01 CIN 0.1 µF 5V 4V CL VIN = 5V Figure 1. Response Time Test Circuit VIN VOUT 7.5V 0V 0V 20 µs/DIV 1460-5 F04 Figure 4. CIN = 0 VGEN VOUT VOUT 5V 4V RL = 10k RL = 1k Figure 3. CL = 0.01µF 10 µs/DIV 1460-5 F03 VGEN VOUT VOUT 5V 4V RL = 10k RL = 1k Figure 2. CL = 0 2 µs/DIV 1460-5 F02 |
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