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LT1352 Datasheet(PDF) 9 Page - Linear Technology

Part No. LT1352
Description  Dual and Quad 250uA, 3MHz, 200V/us Operational Amplifiers
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Maker  LINER [Linear Technology]
Homepage  http://www.linear.com

LT1352 Datasheet(HTML) 9 Page - Linear Technology

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Small-Signal Transient
(AV = 1)
Small-Signal Transient
(AV = –1)
Small-Signal Transient
(AV = –1, CL = 1000pF)
1352/53 G33
1352/53 G32
1352/53 G31
Large-Signal Transient
(AV = 1)
Large-Signal Transient
(AV = – 1)
Large-Signal Transient
(AV = 1, CL = 10,000pF)
1352/53 G36
1352/53 G35
1352/53 G34
Layout and Passive Components
The LT1352/LT1353 amplifiers are easy to use and toler-
ant of less than ideal layouts. For maximum performance
(for example, fast 0.01% settling) use a ground plane,
short lead lengths and RF-quality bypass capacitors (0.01
to 0.1
µF). For high drive current applications use low ESR
bypass capacitors (1
µF to 10µF tantalum).
The parallel combination of the feedback resistor and
gain setting resistor on the inverting input can combine
with the input capacitance to form a pole which can cause
peaking or even oscillations. If feedback resistors greater
than 10k are used, a parallel capacitor of value, CF >
(RG)(CIN/RF), should be used to cancel the input pole and
optimize dynamic performance. For applications where
the DC noise gain is one and a large feedback resistor is
used, CF should be greater than or equal to CIN. An
example would be an I-to-V converter as shown in the
Typical Applications section.
Capacitive Loading
The LT1352/LT1353 are stable with any capacitive load.
As the capacitive load increases, both the bandwidth and
phase margin decrease so there will be peaking in the
frequency domain and in the transient response. Graphs
of Frequency Response vs Capacitive Load, Capacitive
Load Handling and the transient response photos clearly
show these effects.
Input Considerations
Each of the LT1352/LT1353 amplifier inputs is the base of
an NPN and PNP transistor whose base currents are of
opposite polarity and provide first order bias current
cancellation. Because of variation in the matching of NPN
and PNP beta, the polarity of the input current can be
positive or negative. The offset current does not depend on
NPN to PNP beta matching and is well controlled. The use
of balanced source resistance at each input is recom-

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