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LTC2621 Datasheet(PDF) 4 Page - Linear Technology

Part No. LTC2621
Description  16-/14-/12-Bit Rail-to-Rail DACs in 10-Lead DFN
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Maker  LINER [Linear Technology]
Homepage  http://www.linear.com
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LTC2621 Datasheet(HTML) 4 Page - Linear Technology

 
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LTC2601/LTC2611/LTC2621
4
2601fb
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIL
Digital Input Low Voltage
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
l
l
0.8
0.6
V
V
VOH
Digital Output High Voltage
Load Current = –100μA
l VCC – 0.4
V
VOL
Digital Output Low Voltage
Load Current = +100μA
l
0.4
V
ILK
Digital Input Leakage
VIN = GND to VCC
l
±1
μA
CIN
Digital Input Capacitance
(Note 4)
l
8pF
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. REF = 4.096V (VCC = 5V), REF = 2.048V (VCC = 2.5V), VOUT unloaded,
unless otherwise noted. (Note 8)
The
l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
REF = 4.096V (VCC = 5V), REF = 2.048V (VCC = 2.5V), VOUT unloaded, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
LTC2621/ LTC2621-1
LTC2611/ LTC2611-1
LTC2601/ LTC2601-1
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
AC Performance
tS
Settling Time (Note 6)
±0.024% (±1LSB at 12 Bits)
±0.006% (±1LSB at 14 Bits)
±0.0015% (±1LSB at 16 Bits)
77
9
7
9
10
μs
μs
μs
Settling Time for 1LSB Step
(Note 7)
±0.024% (±1LSB at 12 Bits)
±0.006% (±1LSB at 14 Bits)
±0.0015% (±1LSB at 16 Bits)
2.7
2.7
4.8
2.7
4.8
5.2
μs
μs
μs
Voltage Output Slew Rate
0.80
0.80
0.80
V/μs
Capacitive Load Driving
1000
1000
1000
pF
Glitch Impulse
At Midscale Transition
12
12
12
nV • s
Multiplying Bandwidth
180
180
180
kHz
en
Output Voltage Noise
Density
At f = 1kHz
At f = 10kHz
120
100
120
100
120
100
nV/√Hz
nV/√Hz
Output Voltage Noise
0.1Hz to 10Hz
15
15
15
μVP-P
TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (See Figure 1) (Notes 4, 8)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC = 2.5V to 5.5V
t1
SDI Valid to SCK Setup
l
4ns
t2
SDI Valid to SCK Hold
l
4ns
t3
SCK High Time
l
9ns
t4
SCK Low Time
l
9ns
t5
CS/LD Pulse Width
l
10
ns
t6
LSB SCK High to CS/LD High
l
7ns
t7
CS/LD Low to SCK High
l
7ns
t8
SDO Propagation Delay from SCK Falling Edge
CLOAD = 10pF
VCC = 4.5V to 5.5V
VCC = 2.5V to 5.5V
l
l
20
45
ns
ns
t9
CLR Pulse Width
l
20
ns
t10
CS/LD High to SCK Positive Edge
l
7ns
t12
LDAC Pulse Width
l
15
ns
t13
CS/LD High to LDAC High or Low Transition
l
200
ns
SCK Frequency
50% Duty Cycle
l
50
MHz


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