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LTC1863L Datasheet(PDF) 4 Page - Linear Technology

Part # LTC1863L
Description  Micropower, 3V, 12-/16-Bit, 8-Channel 175ksps ADCs
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1863L Datasheet(HTML) 4 Page - Linear Technology

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LTC1863L/LTC1867L
4
1863l7lfd
For more information www.linear.com/LTC1863L
DIGITAL INPUTS AND DIGITAL OUTPUTS The
l
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
LTC1863L/LTC1867L/LTC1867LA
UNITS
MIN
TYP
MAX
IIN
Digital Input Current
VIN = 0V to VDD
l
±10
µA
CIN
Digital Input Capacitance
2
pF
VOH
High Level Output Voltage (SDO)
VDD = 2.7V, IO = –10µA
VDD = 2.7V, IO = –200µA
l
23
2.68
2.65
V
V
VOL
Low Level Output Voltage (SDO)
VDD = 2.7V, IO = 160µA
VDD = 2.7V, IO = 1.6µA
l
0.05
0.15
0.4
V
V
ISOURCE
Output Source Current
SDO = 0V
–9.7
mA
ISINK
Output Sink Current
SDO = VDD
6
mA
Hi-Z Output Leakage
Hi-Z Output Capacitance
CS/CONV = High, SDO = 0V or VDD
CS/CONV = High (Note 10)
l
l
±10
15
µA
pF
Data Format
Unipolar
Bipolar
Straight Binary
Two’s Complement
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
LTC1863L/LTC1867L/LTC1867LA
UNITS
MIN
TYP
MAX
VDD
Supply Voltage
(Note 9)
2.7
3.6
V
IDD
Supply Current
fSAMPLE = 175ksps, Internal REF
NAP Mode
SLEEP Mode
l
l
0.75
170
0.2
1
3
mA
µA
µA
PDISS
Power Dissipation
fSAMPLE = 175ksps
l
2
2.7
mW
TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
LTC1863L/LTC1867L/LTC1867LA
UNITS
MIN
TYP
MAX
fSAMPLE
Maximum Sampling Frequency
l
175
kHz
tCONV
Conversion Time
l
3.2
3.7
µs
tACQ
Acquisition Time
l
2.01
1.68
µs
fSCK
SCK Frequency
20
MHz
t1
CS/CONV High Time
Short CS/CONV Pulse Mode
l
40
100
ns
t2
SDO Valid After SCK↓
CL = 25pF (Note 11)
l
22
47
ns
t3
SDO Valid Hold Time After SCK↓
CL = 25pF
l
5
17
ns
t4
SDO Valid After CS/CONV↓
CL = 25pF
l
20
40
ns
t5
SDI Setup Time Before SCK↑
l
15
–6
ns
t6
SDI Hold Time After SCK↑
l
15
6
ns
t7
SLEEP Mode Wake-Up Time
CREFCOMP = 10µF, CVREF = 2.2µF
80
ms
t8
Bus Relinquish Time After CS/CONV↑
CL = 25pF
l
30
50
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND (unless otherwise
noted).
Note 3: When these pin voltages are taken below GND or above VDD, they
will be clamped by internal diodes. This product can handle input currents
up to 100mA without latchup.


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