11

LT1121/LT1121-3.3/LT1121-5

S

APPLICATI

I FOR ATIO

When the input of the LT1121 is forced to a voltage below

its nominal output voltage and its output is held high, the

reverse output current will still follow the curve in Figure

2. This condition can occur if the input of the LT1121 is

connected to a discharged (low voltage) battery and the

output is held up by either a backup battery or by a second

regulator circuit. When the input pin is forced below the

output pin or the output pin is pulled above the input pin,

the input current will typically drop to less than 2

µA (see

Figure 3). The state of the shutdown pin will have no effect

on the reverse output current when the output is pulled

above the input.

INPUT VOLTAGE (V)

0

5

4

3

2

1

0

4

1121 F03

1

2

3

5

Figure 3. Input Current

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

Table 6. Fault Conditions

INPUT PIN

SHDN PIN

OUTPUT PIN

Open (Hi)

Reverse Output Current

≈ 15µA (See Figure 2)

Input Current

≈ 1µA (See Figure 3)

Grounded

Reverse Output Current

≈ 15µA (See Figure 2)

Input Current

≈ 1µA (See Figure 3)

Open

Open (Hi)

Reverse Output Current

≈ 15µA (See Figure 2)

Open

Grounded

Reverse Output Current

≈ 15µA (See Figure 2)

≤ 0.8V

Open (Hi)

≤ 0V

Output Current = 0

≤ 0.8V

Grounded

≤ 0V

Output Current = 0

> 1.5V

Open (Hi)

≤ 0V

Output Current = Short-Circuit Current

Grounded

≤ 0V

Output Current = 0