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LT1037MJ8 Datasheet(PDF) 4 Page - Linear Technology |
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LT1037MJ8 Datasheet(HTML) 4 Page - Linear Technology |
4 / 16 page 4 LT1007/LT1037 ELECTRICAL CHARACTERISTICS VS = ±15V, –40°C ≤ TA ≤ 85°C, unless otherwise noted. VS = ±15V, –55°C ≤ TA ≤ 125°C, unless otherwise noted. LT1007I/LT1037I SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage (Note 1) q 40 125 µV ∆VOS Average Input Offset Drift (Note 9) q 0.3 1.0 µV/°C ∆Temp IOS Input Offset Current q 20 80 nA IB Input Bias Current q ±25 ±90 nA Input Voltage Range q ±10 ±11.7 V CMRR Common Mode Rejection Ratio VCM = ±10.5V q 105 120 dB PSRR Power Supply Rejection Ratio VS = ±4.5V to ±18V q 101 120 dB AVOL Large-Signal Voltage Gain RL ≥ 2k, VO = ±10V q 2.0 15.0 V/ µV RL ≥ 1k, VO = ±10V q 1.5 12.0 V/ µV VOUT Maximum Output Voltage Swing RL ≥ 2k q ±12.0 ±13.6 V PD Power Dissipation q 95 165 mW LT1007AM/LT1037AM LT1007M/LT1037M SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS VOS Input Offset Voltage (Note 1) q 25 60 50 160 µV ∆VOS Average Input Offset Drift (Note 9) q 0.2 0.6 0.3 1.0 µV/°C ∆Temp IOS Input Offset Current q 15 50 20 85 nA IB Input Bias Current q ±20 ±60 ±35 ±95 nA Input Voltage Range q ±10.3 ±11.5 ±10.3 ±11.5 V CMRR Common Mode Rejection Ratio VCM = ±10.3V q 112 126 104 120 dB PSRR Power Supply Rejection Ratio VS = ±4.5V to ±18V q 104 126 100 120 dB AVOL Large-Signal Voltage Gain RL ≥ 2k, VO = ±10V q 3.0 14.0 2.0 14.0 V/ µV RL ≥ 1k, VO = ±10V q 2.0 10.0 1.5 10.0 V/ µV VOUT Maximum Output Voltage Swing RL ≥ 2k q ±12.5 ±13.5 ±12.0 ±13.5 V PD Power Dissipation q 100 150 100 170 mW The q denotes the specifications which apply over the full operating temperature range. For MIL-STD components, please refer to LTC 883C data sheet for test listing and parameters. Note 1: Input Offset Voltage measurements are performed by automatic test equipment approximately 0.5 seconds after application of power. AM and AC grades are guaranteed fully warmed up. Note 2: Long Term Input Offset Voltage Stability refers to the average trend line of Offset Voltage vs Time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in VOS during the first 30 days are typically 2.5 µV. Refer to typical performance curve. Note 3: This parameter is tested on a sample basis only. Note 4: 10Hz noise voltage density is sample tested on every lot. Devices 100% tested at 10Hz are available on request. Note 5: See the test circuit and frequency response curve for 0.1Hz to 10Hz tester in the Applications Information section. Note 6: See the test circuit for current noise measurement in the Applications Information section. Note 7: This parameter is guaranteed by design and is not tested. Note 8: The inputs are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise. If differential input voltage exceeds ±0.7V, the input current should be limited to 25mA. Note 9: The Average Input Offset Drift performance is within the specifications unnulled or when nulled with a pot having a range of 8k Ω to 20k Ω. |
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