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PALCE16V8 Datasheet(PDF) 2 Page - Lattice Semiconductor

Part No. PALCE16V8
Description  EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic
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Maker  LATTICE [Lattice Semiconductor]
Homepage  http://www.latticesemi.com
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PALCE16V8 and PALCE16V8Z Families
BLOCK DIAGRAM
FUNCTIONAL DESCRIPTION
The PALCE16V8 is a universal PAL device. The PALCE16V8Z is the zero-power version of the
PALCE16V8. It has all the architectural features of the PALCE16V8. In addition, the PALCE16V8Z
has zero standby power and an unused product term disable feature for reduced power
consumption. It has eight independently configurable macrocells (MC0-MC7). Each macrocell can
be configured as registered output, combinatorial output, combinatorial I/O or dedicated input.
The programming matrix implements a programmable AND logic array, which drives a fixed OR
logic array. Buffers for device inputs have complementary outputs to provide user-
programmable input signal polarity. Pins 1 and 11 serve either as array inputs or as clock (CLK)
and output enable (OE), respectively, for all flip-flops.
Unused input pins should be tied directly to VCC or GND. Product terms with all bits
unprogrammed (disconnected) assume the logical HIGH state, and product terms with both true
and complement of any input signal connected assume a logical LOW state.
The programmable functions on the PALCE16V8 are automatically configured from the user’s
design specification. The design specification is processed by development software to verify
the design and create a programming file (JEDEC). This file, once downloaded to a programmer,
configures the device according to the user’s desired function.
The user is given two design options with the PALCE16V8. First, it can be programmed as a
standard PAL device from the PAL16R8 series. The PAL programmer manufacturer will supply
device codes for the standard PAL device architectures to be used with the PALCE16V8.
The programmer will program the PALCE16V8 in the corresponding architecture. This allows
the user to use existing standard PAL device JEDEC files without making any changes to them.
Programmable AND Array
32 x 64
MACRO
MC0
MACRO
MC1
MACRO
MC2
MACRO
MC3
MACRO
MC4
MACRO
MC5
MACRO
MC6
MACRO
MC7
OE
/I9
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
8
I1 – I8
CLK/I0
16493E-1




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