MACHLV210-12 datasheet(21/29 Pages) LATTICE

Part #	MACHLV210-12

Description	High Density EE CMOS Programmable Logic

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Manufacturer	LATTICE [Lattice Semiconductor]

Direct Link	http://www.latticesemi.com

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21 / 29 page

21

MACHLV210-12/15/20

ENDURANCE CHARACTERISTICS

The MACHLV210 is manufactured using our ad-

vanced Electrically Erasable process. This technology

uses an EE cell to replace the fuse link used in bipolar

parts. As a result, the device can be erased and

reprogrammed, a feature which allows 100% testing at

the factory.

Parameter

Symbol

Parameter Description

Test Conditions

Min

Unit

Max Storage

10

Years

Temperature

Max Operating

20

Years

Temperature

N

Max Reprogramming Cycles

Normal Programming

100

Cycles

Conditions

tDR

Min Pattern Data Retention Time

INPUT/OUTPUT EQUIVALENT SCHEMATICS

Program/Verify

Circuitry

Input

Output

Preload

Circuitry

17908D-9

ESD

Protection

Feedback

Input

VCC

>50 k

Ω

>50 k

Ω

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MACHLV210-12 Datasheet(PDF) 21 Page - Lattice Semiconductor

MACHLV210-12 Datasheet(HTML) 21 Page - Lattice Semiconductor

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