Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

ISPLSI2032VE-180LT48 Datasheet(PDF) 1 Page - Lattice Semiconductor

Part No. ISPLSI2032VE-180LT48
Description  3.3V In-System Programmable High Density SuperFAST??PLD
Download  14 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

ISPLSI2032VE-180LT48 Datasheet(HTML) 1 Page - Lattice Semiconductor

  ISPLSI2032VE-180LT48 Datasheet HTML 1Page - Lattice Semiconductor ISPLSI2032VE-180LT48 Datasheet HTML 2Page - Lattice Semiconductor ISPLSI2032VE-180LT48 Datasheet HTML 3Page - Lattice Semiconductor ISPLSI2032VE-180LT48 Datasheet HTML 4Page - Lattice Semiconductor ISPLSI2032VE-180LT48 Datasheet HTML 5Page - Lattice Semiconductor ISPLSI2032VE-180LT48 Datasheet HTML 6Page - Lattice Semiconductor ISPLSI2032VE-180LT48 Datasheet HTML 7Page - Lattice Semiconductor ISPLSI2032VE-180LT48 Datasheet HTML 8Page - Lattice Semiconductor ISPLSI2032VE-180LT48 Datasheet HTML 9Page - Lattice Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 1 / 14 page
background image
ispLSI
®
2032VE
3.3V In-System Programmable
High Density SuperFAST™ PLD
2032ve_07
1
Features
• SuperFAST HIGH DENSITY IN-SYSTEM
PROGRAMMABLE LOGIC
— 1000 PLD Gates
— 32 I/O Pins, Two Dedicated Inputs
— 32 Registers
— High Speed Global Interconnect
— Wide Input Gating for Fast Counters, State
Machines, Address Decoders, etc.
— Small Logic Block Size for Random Logic
— 100% Functional, JEDEC and Pinout Compatible
with ispLSI 2032V Devices
• 3.3V LOW VOLTAGE 2032 ARCHITECTURE
— Interfaces With Standard 5V TTL Devices
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY
fmax = 225 MHz Maximum Operating Frequency
tpd = 4.0 ns Propagation Delay
— Electrically Erasable and Reprogrammable
— Non-Volatile
— 100% Tested at Time of Manufacture
— Unused Product Term Shutdown Saves Power
• IN-SYSTEM PROGRAMMABLE
— 3.3V In-System Programmability Using Boundary
Scan Test Access Port (TAP)
— Open-Drain Output Option for Flexible Bus Interface
Capability, Allowing Easy Implementation of
Wired-OR or Bus Arbitration Logic
— Increased Manufacturing Yields, Reduced Time-to-
Market and Improved Product Quality
— Reprogram Soldered Devices for Faster Prototyping
• 100% IEEE 1149.1 BOUNDARY SCAN TESTABLE
• THE EASE OF USE AND FAST SYSTEM SPEED OF
PLDs WITH THE DENSITY AND FLEXIBILITY OF FPGAs
— Enhanced Pin Locking Capability
— Three Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Programmable Output Slew Rate Control
— Flexible Pin Placement
— Optimized Global Routing Pool Provides Global
Interconnectivity
• ispDesignEXPERT™ – LOGIC COMPILER AND COM-
PLETE ISP DEVICE DESIGN SYSTEMS FROM HDL
SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING
— Superior Quality of Results
— Tightly Integrated with Leading CAE Vendor Tools
— Productivity Enhancing Timing Analyzer, Explore
Tools, Timing Simulator and ispANALYZER™
— PC and UNIX Platforms
Functional Block Diagram
Global Routing Pool
(GRP)
A0
A1
A3
A7
A6
A5
A4
A2
GLB
Logic
Array
DQ
DQ
DQ
DQ
0139Bisp/2000
Description
The ispLSI 2032VE is a High Density Programmable
Logic Device that can be used in both 3.3V and 5V
systems. The device contains 32 Registers, 32 Universal
I/O pins, two Dedicated Input Pins, three Dedicated
Clock Input Pins, one dedicated Global OE input pin and
a Global Routing
Pool (GRP).
The GRP provides
complete interconnectivity between all of these elements.
The ispLSI 2032VE features in-system programmability
through the Boundary Scan Test Access Port (TAP) and
is 100% IEEE 1149.1 Boundary Scan Testable. The
ispLSI 2032VE offers non-volatile reprogrammability of
the logic, as well as the interconnect to provide truly
reconfigurable systems.
The basic unit of logic on the ispLSI 2032VE device is the
Generic Logic Block (GLB). The GLBs are labeled A0, A1
.. A7 (see Figure 1). There are a total of eight GLBs in the
ispLSI 2032VE device. Each GLB is made up of four
macrocells. Each GLB has 18 inputs, a programmable
AND/OR/Exclusive OR array, and four outputs which can
be configured to be either combinatorial or registered.
Inputs to the GLB come from the GRP and dedicated
inputs. All of the GLB outputs are brought back into the
GRP so that they can be connected to the inputs of any
GLB on the device.
Copyright © 2000 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
September 2000
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com


Similar Part No. - ISPLSI2032VE-180LT48

ManufacturerPart No.DatasheetDescription
Lattice Semiconductor
Lattice Semiconductor
ISPLSI2032VE LATTICE-ISPLSI2032VE Datasheet
260Kb / 15P
   3.3V In-System Programmable High Density SuperFAST??PLD
ISPLSI2032VE110LB49 LATTICE-ISPLSI2032VE110LB49 Datasheet
260Kb / 15P
   3.3V In-System Programmable High Density SuperFAST??PLD
ISPLSI2032VE110LB49I LATTICE-ISPLSI2032VE110LB49I Datasheet
260Kb / 15P
   3.3V In-System Programmable High Density SuperFAST??PLD
ISPLSI2032VE110LJ44 LATTICE-ISPLSI2032VE110LJ44 Datasheet
260Kb / 15P
   3.3V In-System Programmable High Density SuperFAST??PLD
ISPLSI2032VE110LJ44I LATTICE-ISPLSI2032VE110LJ44I Datasheet
260Kb / 15P
   3.3V In-System Programmable High Density SuperFAST??PLD
More results

Similar Description - ISPLSI2032VE-180LT48

ManufacturerPart No.DatasheetDescription
Lattice Semiconductor
Lattice Semiconductor
ISPLSI2128VE LATTICE-ISPLSI2128VE_04 Datasheet
200Kb / 20P
   3.3V In-System Programmable SuperFAST??High Density PLD
2064VE LATTICE-2064VE Datasheet
200Kb / 15P
   3.3V In-System Programmable High Density SuperFAST??PLD
2192VE LATTICE-2192VE Datasheet
144Kb / 15P
   3.3V In-System Programmable SuperFAST??High Density PLD
2096VE LATTICE-2096VE Datasheet
160Kb / 12P
   3.3V In-System Programmable SuperFAST??High Density PLD
2128VE LATTICE-2128VE Datasheet
234Kb / 19P
   3.3V In-System Programmable SuperFAST??High Density PLD
ISPLSI2032VE LATTICE-ISPLSI2032VE_06 Datasheet
260Kb / 15P
   3.3V In-System Programmable High Density SuperFAST??PLD
ISPLSI2192VE LATTICE-ISPLSI2192VE_04 Datasheet
161Kb / 15P
   3.3V In-System Programmable SuperFAST??High Density PLD
ISPLSI2128VE-100LTN100 LATTICE-ISPLSI2128VE-100LTN100 Datasheet
206Kb / 20P
   3.3V In-System Programmable SuperFAST??High Density PLD
ISPLSI2032E LATTICE-ISPLSI2032E Datasheet
141Kb / 14P
   In-System Programmable SuperFAST High Density PLD
2064E LATTICE-2064E Datasheet
144Kb / 11P
   In-System Programmable SuperFAST??High Density PLD
More results


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz