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LTC3726 Datasheet(PDF) 10 Page - Linear Technology

Part # LTC3726
Description  Secondary-Side Synchronous Forward Controller
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3726 Datasheet(HTML) 10 Page - Linear Technology

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10
LTC3726
3726fb
pin (see Slave Mode Operation). The Phase angle cannot
be adjusted when the FB/PHASE pin is being used for
voltage loop regulation.
Soft-Start
The soft-start circuitry has four functions: 1) to provide a
shutdown, 2) to provide a smooth ramp on the output
voltage during start-up, 3) to limit the output current in a
short-circuit situation by entering a hiccup mode, and
4) to communicate fault and shutdown information
between multiple LTC3726s in a PolyPhase application.
When the RUN/SS pin is pulled to GND, the chip is placed
into shutdown mode. If this pin is released, the RUN/SS
pin is initially charged with a 50
µAcurrentsource.Afterthe
RUN/SS pin gets above 0.5V, the chip is enabled. At the
instant that the LTC3726 is first enabled, the RUN/SS
voltage is rapidly preset to a voltage that will correspond
to the main output voltage of the DC/DC converter. (See
the Self-Starting Architecture section.) After this preset
interval has completed, the normal soft-start interval
begins and the charging current is reduced to 5
µA. The
external soft-start voltage is used to internally ramp up the
0.6V reference (positive) input to the error amplifier.
When fully charged, the RUN/SS voltage remains at 3V.
In the event that the sensed switch or inductor current
exceeds the overcurrent trip threshold, an internal fault
latch is tripped. When such a fault is detected, the LTC3726
immediately goes to zero duty cycle and initiates a soft-
start retry. Prior to discharging the soft-start capacitor,
however, the LTC3726 first puts a voltage pulse on the
RUN/SS pin, which trips the fault latch in any other
LTC3726 that shares the RUN/SS. This ensures an orderly
shutdown of all phases in a PolyPhase application. After
the soft-start capacitor is fully discharged, the LTC3726
attempts a restart. If the fault is persistent, the system
enters a “hiccup” mode.
Note that in self-starting secondary-side control applica-
tions (with the LTC3705 or LTC3725), the presence of the
LT3726 bias voltage is dependent upon the regular switch-
ing of the primary-side MOSFETs. Therefore, depending
on the details of the application circuit, the LTC3726 may
lose its bias voltage after a fault has been detected and
before completing a soft-start retry. In this case, the
“hiccup-mode” operation is actually governed by the
LTC3705/LTC3725 soft-start circuitry (see the LTC3705/
LTC3725 data sheets).
Drive Mode and Maximum Duty Cycle
Although the LTC3726 is primarily intended to be used
with the LTC3705/LTC3725 in forward converter applica-
tions, the MODE pin provides the flexibility to use the
LTC3726 in a wide variety of additional applications. This
pin can be used to defeat the gate drive encoding scheme,
as well as change the maximum duty cycle from its default
value of 50%. The use of the MODE pin is summarized in
Table 3.
When the gate drive encoding scheme is defeated, a
standard PWM-style signal will be present at the PT+ pin
and a reference clock (in phase with the PWM signal) will
be present at the PTpin. These outputs can be used in
“standalone” applications (without the LTC3705/LTC3725)
to drive the gates of MOSFETs in a conventional manner.
Table 3
PT+/PTMode
INTENDED
MODE PIN
(MAX DUTY CYCLE)
APPLICATION
GND
Encoded PWM
2-Switch Forward
(DMAX = 50%)
with LTC3705
VCC
Encoded PWM
1-Switch Forward
(DMAX = 75%)
with LTC3725
200k
Ω to GND
Standard PWM
2-Switch Forward
(DMAX = 50%)
Standalone
100k
Ω to GND
Standard PWM
1-Switch Forward
(DMAX = 75%)
Standalone
Overvoltage Protection
This circuit monitors the voltage on the FB input. If the
voltage on the FB pin exceeds 117% of 0.6V (0.7V), an
overvoltage (OVP) is detected. For overvoltage protection,
the secondary-side synchronous MOSFET is turned on
while all other MOSFETs are turned off. This protection
mode is not latched, so that the overvoltage detection is
cleared if the FB voltage falls below 115% of 0.6V (0.69V).
OPERATIO


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