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LTC3453 Datasheet(PDF) 11 Page - Linear Technology |
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LTC3453 Datasheet(HTML) 11 Page - Linear Technology |
11 / 12 page LTC3453 11 3453fa APPLICATIO S I FOR ATIO Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. Unused Outputs If fewer than 4 LED pins are to be used, unused LEDx pins should be connected to VOUT. The LTC3453 senses which current source outputs are not being used and shuts off the corresponding output currents to save power. A small trickle current (~30 µA) is still applied to unused outputs to detect if a white LED is later switched in and also to distinguish unused outputs from used outputs during startup. LED Failure Modes If an individual LED fails as a short circuit, the current source biasing it is shut off to save power. This is the same operation as described previously (if the output were initially designated unused at power-up by connecting its LEDx pin to VOUT). Efficiency is not materially affected. If an individual LED fails as an open circuit, the control loop will initially attempt to regulate off of its current source feedback signal, since it will appear to be the one requiring the largest forward voltage drop to run at its programmed current. This will drive VOUT higher. As the open circuited LED will never accept its programmed current, VOUT must be voltage-limited by means of a secondary control loop. The LTC3453 limits VOUT to 4.5V in this failure mode. The other LEDs will still remain biased at the correct pro- grammed current but the overall circuit efficiency will decrease. PACKAGE DESCRIPTIO UF Package 16-Lead Plastic QFN (4mm × 4mm) (Reference LTC DWG # 05-08-1692) 4.00 ± 0.10 (4 SIDES) NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1 TOP MARK (NOTE 6) 0.55 ± 0.20 16 15 1 2 BOTTOM VIEW—EXPOSED PAD 2.15 ± 0.10 (4-SIDES) 0.75 ± 0.05 R = 0.115 TYP 0.30 ± 0.05 0.65 BSC 0.200 REF 0.00 – 0.05 (UF16) QFN 1004 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 0.72 ±0.05 0.30 ±0.05 0.65 BSC 2.15 ± 0.05 (4 SIDES) 2.90 ± 0.05 4.35 ± 0.05 PACKAGE OUTLINE PIN 1 NOTCH R = 0.20 TYP OR 0.35 × 45° CHAMFER |
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Similar Description - LTC3453_15 |
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