Data Sheet S15806EJ1V0DS

9

µµµµPD16782

5. FUNCTIONAL DESCRIPTION

5.1 Multiplexer Circuit

This circuit selects RGB video signals input to the C1 to C3 pins according to the pixel array of the liquid crystal panel,

Vertical stripe array, single-/double-side delta array, or mosaic array can be selected by using the MP/TH and MP/1.5

pins.

5.1.1 Vertical stripe array mode (MP/TH = L, MP/1.5 = L)

In this mode, the relation between video signals C1 to C3, and output pins is as shown below. This mode is used to drive

a panel of vertical stripe array. In this mode, the multiplexer circuit is in the through status.

Table 5

−−−−1. Relation between Video Signals C1 to C3, and Output Pins (during right shift)

Line No. (number

of INHs)

RESET

INH

...

0H

L

Sampling

C1 (C3)

Sampling

C2 (C2)

Sampling

C3 (C1)

Sampling

C1 (C3)

...

Sampling

C2 (C2)

Sampling

C3 (C1)

1L

↓

Output

C1 (C3)

Output

C2 (C2)

Output

C3 (C1)

Output

C1 (C3)

...

Output

C2 (C2)

Output

C3 (C1)

2L

↓

Output

C1 (C3)

Output

C2 (C2)

Output

C3 (C1)

Output

C1 (C3)

...

Output

C2 (C2)

Output

C3 (C1)

3L

↓

Output

C1 (C3)

Output

C2 (C2)

Output

C3 (C1)

Output

C1 (C3)

...

Output

C2 (C2)

Output

C3 (C1)

:

:

:

:::

:

...

:

:

Remark ( ) indicates the case of left shift.

Figure 5

−−−−1. Pixel Arrangement of Vertical Stripe Array and Multiplexer Operation

R

R

R

R

R

B

B

B

B

B

G

G

G

G

G

R

R

R

R

R

B

B

B

B

B

G

G

G

G

G

R

R

R

R

R

C1

C2

C3

R

B

G

µPD16782

Right shift (R,/L = "H"), MP/TH = "L", MP/1.5 = "L"