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PD62 Datasheet(PDF) 13 Page - Renesas Technology Corp |
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PD62 Datasheet(HTML) 13 Page - Renesas Technology Corp |
13 / 66 page 11 µPD62 Data Sheet U14208EJ1V0DS00 Figure 2-4. Data Memory Organization R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF R10 R00 R11 R01 R12 R02 R13 R03 R14 R04 R15 R05 R16 R06 R17 R07 R18 R08 R19 R09 R1A R0A R1B R0B R1C R0C R1D R0D R1E R0E R1F R0F →DP (refer to 2.6 Data Pointer (DP)) →ASR (refer to 2.3 Address Stack Register (ASR (RF))) R1n (high-order 4 bits) R0n (low-order 4 bits) 2.6 Data Pointer (DP): 10 Bits The ROM data table can be referenced by setting the ROM address in the data pointer to call the ROM contents. The low-order 8 bits of the ROM address are specified by R0 of the data memory; and the high-order 2 bits by bits 4 and 5 of the P3 register (CR0). When reset, the pointer contents become “000H”. Figure 2-5. Data Pointer Organization 2.7 Accumulator (A): 4 Bits The accumulator, which refers to a register consisting of 4 bits, plays a leading role in performing various operations. When reset, the accumulator contents are left undefined. Figure 2-6. Accumulator Organization A3 A2 A1 A0 A R00 DP9 DP8 DP7 DP6 DP5 DP4 DP3 DP2 DP1 DP0 R10 P3 R0 b4 b5 P3 Register |
Similar Part No. - PD62_15 |
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Similar Description - PD62_15 |
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