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UPD66P04B Datasheet(PDF) 3 Page - NEC |
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UPD66P04B Datasheet(HTML) 3 Page - NEC |
3 / 32 page 3 µPD66P04B Data Sheet U13596EJ2V0DS00 BLOCK DIAGRAM LIST OF FUNCTIONS Item µPD66P04B ROM capacity 1002 × 10 bits One-time PROM RAM capacity 32 × 4 bits Stack 1 level (shared with RF of RAM) I/O pin Key input (KI) : 4 pins Key I/O (KI/O) : 8 pins Key expansion input (S0, S1) : 2 pins Remote control transmitter display output (LED) : 1 pin (shared with S1 pin) Number of keys 32 keys 48 keys (when expanded by key expansion input) 96 keys (when expanded by key expansion input and diode) Clock frequency RC oscillation fOSC = 300 to 500 kHz fOSC = 500 kHz to 1 MHzNote Instruction execution time 16 µs (at fOSC = 500 kHz) Carrier frequency fOSC, fOSC/2, fOSC/8, fOSC/12, fOSC/16, fOSC/24, no carrier (high level) Timer 9-bit programmable timer : 1 channel POC circuit Internal Supply voltage VDD = 2.2 to 3.6 V Operating ambient • TA = –40 to +85 °C temperature • TA = –20 to +70 °C (when POC circuit used) Package • 20-pin plastic SOP (300 mil) • 20-pin plastic shrink SOP (300 mil) Note It is necessary to design the application circuit so that the RESET pin goes low at a supply voltage of less than 2.2 V. KI0-KI3 KI/O0-KI/O7 S0, S1/LED PORT KI PORT KI/O PORT S 4 8 2 4 8 2 ONE- TIME PROM RAM SYSTEM CONTROL CARRIER GENERATOR 9-bit TIMER CPU CORE RESET OSCIN OSCOUT VDD GND REM S1/LED |
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