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HD74LV2GT74A Datasheet(PDF) 8 Page - Renesas Technology Corp

Part No. HD74LV2GT74A
Description  Single D–type Flip Flops with Preset and Clear / CMOS Logic Level Shifter
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Maker  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD74LV2GT74A Datasheet(HTML) 8 Page - Renesas Technology Corp

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HD74LV2GT74A
Rev.2.00, Oct.17.2003, page 6 of 9
Switching Characteristics
• V
CC = 3.3 ± 0.3 V
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test
Conditions
FROM
(Input)
TO
(Output)
80
140
70
CL = 15 pF
Maximum clock
frequency
fmax
50
90
45
MHz
CL = 50 pF
7.0
12.5
1.0
14.5
PRE/CLR
8.0
12.0
1.0
14.0
CL = 15 pF
CLK
Q or
Q
9.0
16.0
1.0
18.0
PRE/CLR
Propagation
delay time
tPLH
tPHL
10.0
15.5
1.0
17.5
ns
CL = 50 pF
CLK
Q or
Q
6.0
——7.0
D
Setup time
tsu
5.0
——5.0
ns
PRE or CLR inactive
Hold time
th
0.5
——0.5
ns
6.0
——7.0
PRE or CLR “L”
Pulse width
tw
6.0
——7.0
ns
CLK “H” or “L”
• V
CC = 5.0 ± 0.5 V
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test
Conditions
FROM
(Input)
TO
(Output)
130
180
110
CL = 15 pF
Maximum clock
frequency
fmax
90
140
75
MHz
CL = 50 pF
5.0
7.7
1.0
9.0
PRE/CLR
5.6
7.3
1.0
8.5
CL = 15 pF
CLK
Q or
Q
6.6
9.7
1.0
11.0
PRE/CLR
Propagation
delay time
tPLH
tPHL
7.2
9.3
1.0
10.5
ns
CL = 50 pF
CLK
Q or
Q
5.0
——5.0
D
Setup time
tsu
3.0
——3.0
ns
PRE or CLR inactive
Hold time
th
0.5
——0.5
ns
5.0
——5.0
PRE or CLR “L”
Pulse width
tw
5.0
——5.0
ns
CLK “H” or “L”


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