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LTC1860L Datasheet(PDF) 3 Page - Linear Technology

Part No. LTC1860L
Description  Power, 3V, 12-Bit, 150ksps 1- and 2-Channel ADCs in MSOP
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Maker  LINER [Linear Technology]
Homepage  http://www.linear.com
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LTC1860L Datasheet(HTML) 3 Page - Linear Technology

 
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LTC1860L/LTC1861L
18601Lf
The q denotes specifications which apply
over the full operating temperature range, otherwise specifications are TA = 25°C. VCC = 2.7V, VREF = 2.5V, unless otherwise noted.
TA = 25°C. VCC = 3V, VREF = 3V, fSAMPLE = 150kHz, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SNR
Signal-to-Noise Ratio
72
dB
S/(N + D) Signal-to-Noise Plus Distortion Ratio
1kHz Input Signal
72
dB
THD
Total Hamonic Distortion Up to 5th Harmonic 1kHz Input Signal
86
dB
Full Power Bandwidth
10
MHz
Full Linear Bandwidth
S/(N + D)
≥ 68dB
30
kHz
DY A IC ACCURACY
DIGITAL A D DC ELECTRICAL CHARACTERISTICS
The q denotes specifications which apply over the
full operating temperature range, otherwise specifications are TA = 25°C.
RECO
E DED OPERATI G CO DITIO S
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
High Level Input Voltage
VCC = 3.3V
q
1.9
V
VIL
Low Level Input Voltage
VCC = 2.7V
q
0.45
V
IIH
High Level Input Current
VIN = VCC
q
2.5
µA
IIL
Low Level Input Current
VIN = 0V
q
– 2.5
µA
VOH
High Level Output Voltage
VCC = 2.7V, IO = 10µA
q
2.3
2.6
V
VCC = 2.7V, IO = 360µA
q
2.1
2.45
V
VOL
Low Level Output Voltage
VCC = 2.7V, IO = 400µA
q
0.3
V
IOZ
Hi-Z Output Leakage
CONV = VCC
q
±3
µA
ISOURCE
Output Source Current
VOUT = 0V
– 6.5
mA
ISINK
Output Sink Current
VOUT = VCC
6.5
mA
IREF
Reference Current (LTC1860L SO-8, MSOP
CONV = VCC
q
0.001
3
µA
and LTC1861L MSOP)
fSMPL = fSMPL(MAX)
q
0.01
0.1
mA
ICC
Supply Current
CONV = VCC After Conversion
q
0.5
10
µA
fSMPL = fSMPL(MAX)
q
0.45
1.0
mA
PD
Power Dissipation
fSMPL = fSMPL(MAX)
1.22
mW
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC
Supply Voltage
2.7
3.6
V
fSCK
Clock Frequency
q
DC
8
MHz
tCYC
Total Cycle Time
12 • SCK + tCONV
µs
tSMPL
Analog Input Sampling Time (Note 5)
LTC1860L
12
SCK
LTC1861L
10
SCK
tsuCONV
Setup Time CONV
↓ Before First SCK↑,
60
ns
(See Figure 1)
thDI
Holdtime SDI After SCK
LTC1861L
30
ns
tsuDI
Setup Time SDI Stable Before SCK
LTC1861L
30
ns
tWHCLK
SCK High Time
fSCK = fSCK(MAX)
45%
1/fSCK
tWLCLK
SCK Low Time
fSCK = fSCK(MAX)
45%
1/fSCK
tWHCONV
CONV High Time Between Data
tCONV
µs
Transfer Cycles
tWLCONV
CONV Low Time During Data Transfer
12
SCK
thCONV
Hold Time CONV Low After Last SCK
26
ns


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