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UPD3778 Datasheet(PDF) 5 Page - NEC

Part No. UPD3778
Description  10600 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
Download  24 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD3778 Datasheet(HTML) 5 Page - NEC

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µPD3778
5
Data Sheet S14374EJ1V0DS00
ABSOLUTE MAXIMUM RATINGS (TA = +25
°C)
Parameter
Symbol
Ratings
Unit
Output drain voltage
VOD
–0.3 to +15
V
Shift register clock voltage
Vφ1, Vφ2
–0.3 to +8
V
Reset gate clock voltage
VφRB
–0.3 to +8
V
Reset feed-through level clamp clock voltage
VφCLB
–0.3 to +8
V
Transfer gate clock voltage
VφTG1 to VφTG3
–0.3 to +8
V
Operating ambient temperature
TA
–25 to +60
°C
Storage temperature
Tstg
–40 to +70
°C
Caution
Exposure to ABSOLUTE MAXIMUM RATINGS for extended periods may affect device reliability;
exceeding the ratings could cause permanent damage. The parameters apply independently.
RECOMMENDED OPERATING CONDITIONS (TA = +25
°C)
Parameter
Symbol
MIN.
TYP.
MAX.
Unit
Output drain voltage
VOD
11.4
12.0
12.6
V
Shift register clock high level
Vφ1H, Vφ2H
4.5
5.0
5.5
V
Shift register clock low level
Vφ1L, Vφ2L
–0.3
0
+0.5
V
Reset gate clock high level
VφRBH
4.5
5.0
5.5
V
Reset gate clock low level
VφRBL
–0.3
0
+0.5
V
Reset feed-through level clamp clock high level
VφCLBH
4.5
5.0
5.5
V
Reset feed-through level clamp clock low level
VφCLBL
–0.3
0
+0.5
V
Transfer gate clock high level
VφTG1H to VφTG3H
4.5
Vφ1HNote
Vφ1HNote
V
Transfer gate clock low level
VφTG1L to VφTG3L
–0.3
0
+0.5
V
Data rate
fφRB
1.0
5.0
MHz
Note
When Transfer gate clock high level (VφTG1H to VφTG3H) is higher than Shift register clock high level (Vφ1H),
Image lag can increase.


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