2

LT1015

ORDER PART

NUMBER

Supply Voltage .......................................................... 7V

Differential Input Voltage ........................................... 5V

Input Voltage

Positive................................................ Supply + 0.5V

Negative .............................................................. – 1V

Input Current (Forced) Positive ............................ 20mA

Latch Pin Voltage ........................................ Supply + 1V

Output Current (Continuous) ..............................

±20mA

Operating Temperature Range

LT1015C .................................................. 0

°C to 70°C

LT1015M ........................................ – 55

°C to 125°C*

Storage Temperature ............................ – 65

°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300

°C

Consult factory for Industrial grade parts.

ELECTRICAL CHARACTERISTICS

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Input Offset Voltage (Note 1)

q

120

mV

Input Bias Current

q

15

30

µA

Reference Input Current

q

30

60

µA

Voltage Gain (Note 3)

q

1000

2500

V/V

Common Mode Input Range (Note 5) Minimum Input

q

1.0

1.25

V

Maximum Input

q

V

Output High Voltage

q

2.5

V

Output Low Voltage

q

0.3

0.5

V

Supply Current

q

55

70

mA

Latch Pin High Input Voltage

Device Latched

q

2V

Latch Pin Low Input Voltage

Device Active

q

0.8

V

Latch Pin Current

q

1mA

Propagation Delay

0

q

710

14

ns

–55

q

710

16

ns

Latch Setup Time

2ns

LT1015CJ8

LT1015CN8

LT1015MJ8

1

2

3

4

8

7

6

5

TOP VIEW

INPUT A

REFERENCE

INPUT B

LATCH

OUTPUT A

GND

OUTPUT B

J8 PACKAGE

8-LEAD CERDIP

N8 PACKAGE

8-LEAD PDIP

temperature range.

Note 1: Input offset voltage is the maximum required to drive the output to

a low state of 0.5V and high state of 2.5V.

Note 2: Input currents are measured by applying a large positive

differential input voltage. The resulting input current is divided by two to

obtain input current at

Note 3: Voltage gain is guaranteed by design, but not tested.

Note 4: Propagation delay is sample tested in production with a large

overdrive. The limit is guard banded to account for the slight increase

(

≈ 500ps) at 20mV overdrive.

Note 5: Common mode input range is the voltage range over which the

differential input offset voltage is less than 20mV. If both inputs remain

inside this common mode range, propagation delay will be unaffected. It

will also be normal if the signal input is below the 1.25V lower limit when

the input transition begins. An increase in propagation delay of up to 10ns

may occur if the signal input is above the upper common mode limit when

the transition begins. Sine wave inputs may not be affected when the peak

exceeds the common mode range if the signal is inside the common mode

range for 10ns before threshold is reached.