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UPD2845GR Datasheet(PDF) 1 Page - NEC |
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UPD2845GR Datasheet(HTML) 1 Page - NEC |
1 / 16 page DATA SHEET CMOS DIGITAL INTEGRATED CIRCUITS PPPPPD2845GR 1 V, 1.3 mA, 94MHz PLL SYNTHESIZER LSI FOR PAGER SYSTEM 1994 © Document No. P12150EJ2V0DS00 (2nd edition) (Previous No. IC-3291) Date Published February 1997 N Pi d i J DATA SHEET DESCRIPTION PPD2845GR is a PLL synthesizer LSI for pager system. This LSI is manufactured using low voltage CMOS process and therefore realized the low power consumption PLL operated on 1 V, 1.3 mA. This LSI is packaged in 16 pin plastic SSOP suitable for high-density surface mounting. So, this product contributes to produce a long-life- battery and physically-small pager system. FEATURES • Operating frequency : · Input frequency : fin = 10 MHz to 94 MHz · Reference oscillating frequency : fx’tal = 12.8 MHz • Low Supply voltage : · PLL block : VDD1 = 1.00 V to 1.15 V @ fin = 10 MHz to 70 MHz VDD1 = 1.05 V to 1.15 V @ fin = 10 MHz to 94 MHz · Charge pump block: VDD2 = 3.0 V ± 300 mV • Low power consumption • IDD = 1.3 mA TYP. @ fin = 70 MHz, fx’tal = 12.8 MHz • Equipped with power-save function • Serial data can be received in power-save mode. • Packaged in 16 pin plastic SSOP suitable for high-density surface mounting. ORDERING INFORMATION PART NUMBER PACKAGE SUPPLYING FORM PPD2845GR-E1 16 pin plastic SSOP (225 mil) Embossed tape 12 mm wide. QTY 2.5 k/reel Pin 1 is in tape pull-out direction. PPD2845GR-E2 16 pin plastic SSOP (225 mil) Embossed tape 12 mm wide. QTY 2.5 k/reel Pin 1 is in tape roll-in direction. * To order evaluation samples, please contact your local NEC sales office (Order number : PPD2845GR). PIN ASSIGNMENT VDD1 FIN GND FR RESET EO EOP EON XI XO LE CLK DATA PS NC VDD2 (Top View) Caution Electro-static sensitive devices |
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