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AN668 Datasheet(PDF) 10 Page - STMicroelectronics |
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AN668 Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 19 page  AN668 APPLICATION NOTE 10/19 attach and thin leadframes, the PowerSO-20/36 take advantage of power package technology, with a mas- sive copper slug and tin based alloy die soldering. This results in minimum junction-to-case thermal re- sistance Rth(j-c). Figure 10 shows how much Rth(j-c) is affected by the die size, assuming that the power source is uniformly distributed on the die. For actual applications, Rth(j-c) ranges between 2°C/ W for small dice and 0.5°C/W for the maximum die size of 60k sq mils. Therefore, the PowerSO-20/36 are equivalent to insertion power packages like TO-220 and Multiwatt; this is due to the optimization of the slug dimensions, obtained by removal of any copper in excess, without affecting the thermal cone where the heat flows from the silicon to the substrate. The PowerSO-20/36 offer a new possibility for a pow- er package: direct soldering of the slug onto the board during the surface mount process; therefore junction to substrate thermal resistance is close to Rth(j-c) and reaches the very attractive value of 0.5- 2.0°C/W. Figure 10. Thermal resistance junction-case vs. dissipating area of PowerSO-20/36 3.2 APPLICATIONS WITH 1-2 WATT DISSIPA- TION 3.2.1 On board dissipating elements In this power range, state of the art technology is based on the medium power SO. It has the same outline of a standard SO package but with a modified leadframe in order to have a number of leads connected to the die pad (bat wing struc- ture). This solution, shown in Figure 11, is effective in min- imizing the Junction-to-Pin thermal resistance Rth(j- p), i.e. the thermal path between the junction and suitable dissipating areas obtained on the PCB and connected to the heat transfer leads (Figure 12). Figure 11. Lead frame for medium power SO Figure 12. Foot print for medium power SO Typical representatives of the medium power SO package family are the 300 mils SO20 and SO28 with 8 heat transfer leads, reported as SO(12+4+4) and SO(20+4+4) respectively. Referring to STMicroelectronics guideline "Thermal management in Surface Mount Technology" (July 1988), thermal performance of medium power SO(12+4+4) is defined by the relationship: Rth(j-a) = Rth(j-p) + Rth(sub-amb) where Rth(j-p) is the thermal path from the junction to the board and Rth(sub-amb) is the thermal resis- tance of the two areas shown in Figure 12. Rth(j-p) ranges between 12 and 14°C/W, depending 012345 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 Rth D94AN005 die thickness: 0.375mm Pd=5W side L on die dissipating area silicon side L(mm) D94AN006 |
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