75 Ω Digital Attenuator, 6-Bit, Serial / Parallel Control

31.5 dB, 0.005 - 1.0 GHz

Rev.V2

MAAD-008866

7

7

M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice.

Visit www.macom.com for additional data sheets and product information.

• North America Tel: 800.366.2266 / Fax: 978.366.2266

• Europe Tel: 44.1908.574.200 / Fax: 44.1908.574.300

• Asia/Pacific Tel: 81.44.844.8296 / Fax: 81.44.844.8298

7

Functionality

Modes of Operation: Serial, Direct Parallel, and Latched Parallel

Mode Truth Table

P/S

LE

Mode

1

X

Serial

0

Constant High

Direct Parallel

0

Pulsed

Latched Parallel

Serial Mode

Direct Parallel Mode

Latched Parallel Mode

The serial control interface (SERIN, CLK, LE, SEROUT) is compatible with the SPI protocol. SPI mode is

activated when P/S is kept high. The 6-bit serial word must be loaded with MSB first. After shifting in the 6 bit

word, bringing LE high will set the attenuator to the desired state. While LE is high the CLK is masked to protect

the data while implementing the change . SEROUT is the SERIN delayed by 6 clock cycles.

When P/S is low, the serial control interface is disabled and the serial input register is loaded asynchronously with

parallel digital inputs.

The parallel mode is enabled when P/S is set to low. In the direct parallel mode, the attenuator is controlled by the

parallel control inputs directly. The LE must be at logic high to control the attenuator in this mode.

In the latched parallel mode, the parallel control inputs will be buffered by registers, and loaded to the outputs

when LE is high. The outputs shall not change states when LE is low.

Power-up States

The power-up (PUP) states will work in both serial and parallel modes, and initiate the attenuator according to the

of final value. For serial mode, the PUP states will only work when LE is held low. The PUP state shall be locked

out after the first LE pulse.