RD151TS3314ARP, RD151TS3324ARP

Rev.1.00 May 11, 2006 page 2 of 8

Pin Arrangement

(Top view)

8

VDD

1

7

SEL

6

SSCOUT

5

GND

XIN

2

XOUT

3

4

SSN

NC

Pin Descriptions

Pin name

No.

Type

Description

GND

5

Ground

GND pin

VDD

8

Power

Power supply pin.

NC

3

NC

Don’t connect any VDD or GND.

SSCOUT

6

Output

Spread spectrum modulated clock output.

XIN

1

Input

Oscillator input.

XOUT

2

Output

Oscillator output.

SEL

7

Input

SSC% mode select pin. LVCMOS level input.

Pull-down by internal resistor (350 k

Ω).

SSN

4

Input

SSC ON/OFF select pin. LVCMOS level input.

Pull–down by internal resistor (350 k

Ω).

SSC Function Table

STB

SEL

RD151TS3314ARP(Central spread)

RD151TS3324ARP(Down spread)

0

0

–3.0%*

1

0

1

±0.5%

–1.0%

1

0

1

1

OFF

OFF

Note:

1.

±1.5%(TS3314ARP) / -3.0%(TS3324ARP) SSC is selected for default by internal pull-down resistors.

Clock Frequency Table

PRODUCT

XIN(MHz)

SSCOUT(MHz)

Multiply rate (XIN: SSCOUT)

RD151TS3314ARP

20 to 40

40 to 80

1:2

RD151TS3324ARP

20 to 40

40 to 80

1:2