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THV6530 Datasheet(PDF) 8 Page - THine Electronics, Inc. |
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THV6530 Datasheet(HTML) 8 Page - THine Electronics, Inc. |
8 / 11 page ![]() THine Electronics, Inc. 8/11 Copyright© 2013 THine Electronics, Inc. All rights reserved. THL6530_Rev.1.00_E Fig. 2 VGH setup Negative charge pump (VGL) The negative charge pump is used to generate the TFT LCD gate off voltage. The output voltage, VGL, is set with an external resistive divider from its output to VREF with the midpoint connected to VGL_FB. The error amplifier compares the feedback signal from VGL_FB with an internal reference 240mV. The output voltage VGL is regulated as the following equation. The output voltage VGL is regulated as the following equation. VREF is 1.2V. ) ( _ 7 8 _ FB VGL VREF FB VGL V V R R V VGL Fig. 3 VGL setup VCOM buffer The VCOM buffer generates the bias supply for the back plane of an LCD screen which is capacitively coupled to the pixel drive voltage. The purpose of the VCOM buffer is to hold the bias voltage steady while pixel voltage changes dynamically. The buffer is designed to sustain up to ±75mA of output current. In transients, it can deliver up to 150mA at which point the over current protection circuit limits the output current. Excessive current draw over a period of time may cause the chip temperature to rise and set off the over temperature protection circuit. Protection circuits Under voltage lock out protection (UVLO) The UVLO function is carried in order to prevent malfunction in the state where input voltage is low. A boost converter is suspended to the power supply voltage which can carry out operational stability. UVLO is released by more than 1.8V input voltage. And a boost converter carries out, after starting soft start operation. During normal operation (after completing the soft start sequence) THV6530 constantly monitors feedback pins FB, VGH_FB and VGL_FB. A fault condition occurs if FB falls below 0.95V or VGH_FB falls below 0.95V or VGL_FB rises above 0.45V. If any of the fault conditions persist for longer than 100ms, the chip sets a fault latch and shuts down. To turn the power supplies back on requires cycling of VIN supply below the UVLO level or toggling the EN pin low and high. This will clear the fault latch and restore normal operation. R7 R8 VGL VGL_OUT VGL_FB VREF R7 R8 VGL VGL_OUT VGL_FB VREF R5 R6 VLS VGH_OUT VGH VGH_FB R5 R6 VLS VGH_OUT VGH VGH_FB |
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