Data Sheet S10299EJ4V0DS00

27

4. SELECTING

The command/data for the

µ PD16434 is 8 bits long. However, serial interfacing with the CPU is made in 8-bit

transfer or parallel interfacing is made in two 4-bit transfers. In addition, the

µ PD16434 is provided with a chip address

selection function for multi-chip system configuration. Whether the serial or parallel interface is used and whether or not

the chip address select function is used are specified by the data on the D2 (CAE) line and D1 (P, /S) line at the RESET

signal release timing (falling edge).

Figure 4–1. Interface Specification Timing Waveforms

RESET

D2(CAE)

D1(P, /S)

Table 4–1. Interface Specification Code

D2(CAE)

D1(P, /S)

Serial/parallel

specification

Chip address

selection function

0

0

Serial

Unprovided

1

0

Provided

0/1

1

Parallel

4.1 Functions of Shared Pins

The function of the /STB, /SCK, D3/SO, and the D0/SI pins used for clock input and data input/output differ,

depending on whether the serial interface or the parallel interface is specified, as indicated in Table4–2.

Table 4–2. Function of Shared Pins

Pin name

Serial (P, /S = 0)

Parallel (P, /S = 1)

/STB, /SCK

/SCK input

/STB input

D3/SO

SO output

D3 to D0 input/output

D2(CAE)

–

(4-bit parallel data bus)

D1(P, /S)

–

D0/SI

SI input