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ADT7411 Datasheet(PDF) 20 Page - Analog Devices

Part No. ADT7411
Description  SPI-/IC-Compatible, 10-Bit Digital Temperature Sensor and 8-Channel ADC
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADT7411 Datasheet(HTML) 20 Page - Analog Devices

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ADT7411
Rev. B | Page 20 of 36
UNLOCK ASSOCIATED
MSB REGISTERS
SECOND READ
COMMAND
MSB
REGISTER
OUTPUT
DATA
Figure 30. Phase 2 of 10-Bit Read
If an MSB register is read first, its corresponding LSB register is
not locked out, thus leaving the user with the option of just
reading back 8 bits (MSB) of a 10-bit conversion result. Reading
an MSB register first does not lock out other MSB registers, and
likewise reading an LSB register first does not lock out other
LSB registers.
Table 7. ADT7411 Registers
RD/WR
Address
Name
Power-
on
Default
00h
Interrupt Status 1
00h
01h
Interrupt Status 2
00h
02h
Reserved
03h
Internal Temperature and VDD LSBs
00h
04h
External Temperature and AIN1 to AIN 4 LSBs
00h
05h
AIN5 to AIN8 LSBs
00h
06h
VDD MSBs
xxh
07h
Internal Temperature MSBs
00h
08h
External Temperature MSBs/AIN1 MSBs
00h
09h
AIN2 MSBs
00h
0Ah
AIN3 MSBs
00h
0Bh
AIN4 MSBs
00h
0Ch
AIN5 MSBs
00h
0Dh
AIN6 MSBs
00h
0Eh
AIN7 MSBs
00h
0Fh
AIN8 MSBs
00h
10h-17h
Reserved
18h
Control Configuration 1
08h
19h
Control Configuration 2
00h
1Ah
Control Configuration 3
00h
1Bh-1Ch
Reserved
1Dh
Interrupt Mask 1
00h
1Eh
Interrupt Mask 2
00h
1Fh
Internal Temperature Offset
00h
20h
External Temperature Offset
00h
21h
Reserved
22h
Reserved
23h
VDD VHIGH Limit
C7h
24h
VDD VLOW Limit
62h
25h
Internal THIGH Limit
64h
26h
Internal TLOW Limit
C9h
27h
External THIGH/AIN1 VHIGH Limits
FFh
28h
External TLOW/AIN1 VLOW Limits
00h
29h-2Ah
Reserved
2Bh
AIN2 VHIGH Limit
FFh
2Ch
AIN2 VLOW Limit
00h
2Dh
AIN3 VHIGH Limit
FFh
RD/WR
Address
Name
Power-
on
Default
2Eh
AIN3 VLOW Limit
00h
2Fh
AIN4 VHIGH Limit
FFh
30h
AIN4 VLOW Limit
00h
31h
AIN5 VHIGH Limit
FFh
32h
AIN5 VLOW Limit
00h
33h
AIN6 VHIGH Limit
FFh
34h
AIN6 VLOW Limit
00h
35h
AIN7 VHIGH Limit
FFh
36h
AIN7 VLOW Limit
00h
37h
AIN8 VHIGH Limit
FFh
38h
AIN8 VLOW Limit
00h
39h-4Ch
Reserved
4Dh
Device ID
02h
4Eh
Manufacturer’s ID
41h
4Fh
Silicon Revision
xxh
50h-7Eh
Reserved
00h
7F
SPI Lock Status
00h
80hn-FFh
Reserved
00h
Interrupt Status 1 Register (Read-Only) [Address = 00h]
This 8-bit read-only register reflects the status of some of the
interrupts that can cause the INT/INT pin to go active. This
register is reset by a read operation provided that any out-of-
limit event is corrected. It is also reset by a software reset.
Table 8. Interrupt Status 1 Register
D7
D6
D5
D4
D3
D2
D1
D0
01
01
01
01
01
01
01
01
1 Default settings at power-up.


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