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R2A20056BM Datasheet(PDF) 8 Page - Renesas Technology Corp |
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R2A20056BM Datasheet(HTML) 8 Page - Renesas Technology Corp |
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8 / 38 page  R2A20056BM Apr 15,2013 R03DS0075EJ0100 Rev. 1.23 Page 8 of 37 *1 State transition judgment includes battery temperature detection. State is kept in Default(00H) when TH temperature protection ( Hign or Low) and thermistor open. *2 It's ‘or’ condition with TTHM < TTHCON when THBATCON='1' (set by I2C). *3 It's 'or' condition with TTHM > TTHCON when THBATCON='1' (set by I2C). *4 These judgment times are 384ms for these transitions. *5 Refer to Input voltage detection about the condition of /POK=‘L’ or ‘H’. Timer start 0.2C: 7.68s 0.2C1.0C: 512ms x 48step=24.58s Quick charge (03H) 0.2C to1.0CStop increasing High temp. charge-1 (04H) 0.2C High temp. charge-2 (05H) Charge completion (07H) VBAT < Vqchgon and VBAT < VSYS VBAT < Vqchgon and VBAT < VSYS Ttreg <Tj < Ttrgrst Tj < (Ttreg-Treghys) Tj < (Ttreg-Treghys)Ttrgrst < Tj < Tsd Ttrgrst <Tj < Tsd All state 06H,07H,09H, 0AH,0BH All state Charge completion detection (06H) 64ms x 6=384ms 09H state Vstart <VBAT < Vrechg and VBAT < VSYS Vrechg <VBAT < Vov and VBAT < VSYS Vqchgon <VBAT < Vov and VBAT < VSYS RESET TIMER RESET TIMER RESET TIMER RESET TIMER RESET TIMER RESET TIMER RESET TIMER RESET TIMER RESET TIMER RESET TIMER RESET TIMER Vstart <VBAT < Vqchgon and VBAT < VSYS RESET TIMER 09H state Ichg <Ifc and FULMD=0 and VBAT < VSYS *4 *4 *1 Vqchgon <VBAT < Vov and VBAT < VSYS Battery non- connection(08H) (/STAT=H) Default(00H) (/STAT=H) VIN detected [/POK=‘L’] and USB Normal [USUP=‘L’] and Charge ON [/CEN=‘L’] and VBAT < VSYS *1 0.1C(0.2C): 64ms x 10=640ms Forced charge(01H) (/STAT=L) Timer start 0.1C(0.2C) Trickle charge(02H) (/STAT=L) Timer out[TOUT=1] Error-1(09H) (/STAT=Blink 1) 0V < VBAT < Vstart Tj >Tsd or VBAT >Vov Timer is not reset in the state inside of broken line Charge control Compliant with JEITA guideline (/STAT=L) (/STAT=L) (/STAT=L) (/STAT=H) (/STAT=H) Error-2 (0AH) 01H, 03H,04H and 05H state TTHM >TTHMVH or TTHM < TTHMVL TTHM < TTHMVH and TTHM >TTHMVL HOLD TIMER Vqchgon <VBAT < Vov and VBAT < VSYS RESTART TIMER RESTART TIMER 03H state Error-3 (0BH) 02H state HOLD TIMER TTHM >TTHMVH or TTHM < TTHMVL Vstart<VBAT < Vqchgon and VBAT < VSYS 02H state (/STAT=Blink 2) (/STAT=Blink 2) Notes 1) 2) 3) 4) : Judged after 256ms delay time for preventing erroneous detection. (Others are judged instantly) Under line : Register When VBAT > VSYS (MOSFET between BAT and SYS : ON), the state is not changed except for battery voltage error or chip temperature error. There are 3 operations of timer in each transition for Trickle charge timer and Quick charge timer. - ‘RESET TIMER’ - ‘HOLD TIMER’ - ‘RESTART TIMER’ The release conditions against ‘Error 1’ are as follows: -VIN not detected [/POK=‘H’] - Suspend - Charge stop [/CEN=‘H’] - Battery non-connection Vqchgon <VBAT < Vrechg and VBAT < VSYS Charge state diagram *5 *5 Vstart <VBAT <Vov *3 *2 VIN not detected [/POK=‘H’] or Suspend or Charge stop [/CEN=‘H’] |
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