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ISL6565BCRZ Datasheet(PDF) 7 Page - Intersil Corporation |
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ISL6565BCRZ Datasheet(HTML) 7 Page - Intersil Corporation |
7 / 28 page 7 Absolute Maximum Ratings Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7V Input, Output, or I/O Voltage (except OVP) . .GND -0.3V to VCC + 0.3V OVP Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+15V ESD (Human body model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>4kV ESD (Machine model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>300V ESD (Charged device model) . . . . . . . . . . . . . . . . . . . . . . . . . .>2kV Operating Conditions Supply Voltage, VCC (5V bias mode) . . . . . . . . . . . . . . . . +5V ±5% Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 125°C Thermal Information Thermal Resistance θJA (°C/W) θJC (°C/W) SOIC Package (Note 1) . . . . . . . . . . . . 62 N/A QFN Package (Notes 2, 3). . . . . . . . . . 33 3.5 TSSOP Package (Note 1) . . . . . . . . . . 85 N/A Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C (SOIC - Lead Tips Only) CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. NOTES: 1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 2. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 3. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications Operating Conditions: VCC = 5V or ICC < 25mA (Note 3), TJ = 0°C to 105°C. Unless Otherwise Specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS VCC SUPPLY CURRENT Nominal Supply VCC = 5VDC; EN = 5VDC; RT = 100kΩ, ISEN1 = ISEN2 = ISEN3 = -70 µA -14 18 mA Shutdown Supply VCC = 5VDC; EN = 0VDC; RT = 100kΩ -10 14 mA SHUNT REGULATOR VCC Voltage VCC tied to 12VDC thru 300 Ω resistor, RT = 100kΩ 5.6 5.9 6.2 V VCC Sink Current VCC tied to 12VDC thru 300 Ω resistor, RT = 100kΩ -- 25 mA POWER-ON RESET AND ENABLE POR Threshold VCC Rising 4.2 4.31 4.50 V VCC Falling 3.7 3.82 4.00 V ENABLE Threshold EN Rising 1.29 1.31 1.33 V Hysteresis - 150 - mV Fault Reset 1.10 1.14 1.18 V ENLL Input Logic Low Level -- 0.4 V ENLL input Logic High Level 0.8 - - V ENLL Leakage Current ENLL = 5V - - 1 µA REFERENCE VOLTAGE AND DAC System Accuracy (VID = 1.2V-1.6V, TJ = 0°C to 85°C) -0.5 - 0.5 %VID System Accuracy (VID = 0.8375V-1.1875V TJ = 25°C) -0.7 - 0.7 %VID System Accuracy (VID = 0.8375V-1.1875V, TJ = 0°C to 85°C) -0.8 - 0.8 %VID VID Pull Up -65 -50 -35 µA VID Input Low Level -- 0.4 V VID Input High Level 0.8 - - V DAC Source/Sink Current VID = 010100 -200 - 200 µA REF Source/Sink Current -50 - 50 µA PIN-ADJUSTABLE OFFSET Voltage at OFS pin Offset resistor connected to ground 485 500 515 mV Voltage below VCC, offset resistor connected to VCC 1.97 2.03 2.09 V ISL6565A, ISL6565B |
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