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ISL6590 Datasheet(PDF) 8 Page - Intersil Corporation |
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ISL6590 Datasheet(HTML) 8 Page - Intersil Corporation |
8 / 24 page 8 6-bit Voltage ADC (ISL6580) Each of the ISL6580s contain a 6-bit voltage ADC that can be used to measure the difference between the core voltage at the output and a reference voltage that is set by the VID information. The VID is sent to the designated ISL6580 via the backside serial bus from the ISL6590 prior to soft start. The voltage difference measured is sent via the ERR signal serially to the ISL6590. Even though each ISL6580 has the voltage ADC, only one of them is required to use it. This mode is called the Regulation Mode. The conversion is initiated with the SOC (Start Of Conversion) signal from the ISL6580 pulsing high for two SYSCLK cycles. After another two SYSCLK cycles, the 6 bits of data are shifted out of the ISL6580 on the ERR signal, one bit every two SYSCLK cycles, starting with the MSB. Because the ADC uses a successive approximation architecture, every two SYSCLK cycles converts one bit, for a total of 12 SYSCLK cycles to make the 6-bit conversion. With a 133.3MHz SYSCLK, 66.6MHz is the sample rate per bit of the ADC and is also the serial data rate of the ERR0 signal. However, since the SOC signal initiates the sampling process, the effective overall sample rate of the voltage measuring system is equal to the SOC rate. Window Comparator (ISL6580) Each ISL6580 contains a window comparator. At least two ISL6580s must be configured to use it. One is configured with comparator trip levels for Transient Voltage Mode (ATR described below) and the other for Over/Under Voltage Mode which responds via the fault registers and is described in detail under Fault Processing. Adaptive Voltage Positioning (AVP) The Adaptive Voltage Positioning section of the ISL6590 takes the average current of all the active ISL6580 channels and passes it through an AVP gain factor and a low pass filter. The AVP gain factor sets the slope of the load line so that the voltage at high current loading is intentionally less than the voltage at small current loading. The output of the low pass filter is subtracted from the ADC voltage error (ERR signal) to adjust the operating voltage position. The AVP value is modified in the digital compensation block with the coefficients stored in the ISL6590 memory. The resulting modified output is sent to the PWM generator to adjust the target output voltage for all phases with a voltage offset from the nominal VID so that current and voltage transients can better be accommodated. Active Transient Response (ATR) Voltage Transient Mode must be performed by one ISL6580 in the system (but not one already processing another mode). It is done by using the ATR signals between the ISL6580 and ISL6590. When a large change in current occurs at the load, a large voltage transient also occurs. The ATRH and ATRL levels are designed to trigger a temporary mode in which the PWM generator aligns all phases or removes all phases in order to quickly raise or lower the output voltage. The event is short-lived and the controller quickly returns to normal operation, but the result is an instantaneous boost or reduction in output voltage to keep the transient event within the required regulation window. An ATR window comparator located in the designated ISL6580 generates the ATRH or ATRL indicator signals when the event occurs. The ATRH and ATRL trip levels are offsets from the VID voltage and are set in ISL6590 register 0883h, each with a 4-bit word. The ATRH, ATRL, and VID values from the ISL6590 memory are sent to the designated ISL6580’s registers via the BSB prior to soft start. In the ISL6580, these are added or subtracted from the VID target value with 7.5mV LSB resolution to set the trip levels. Whereas AVP is performed with slight, tightly controlled modifications to the PWM duty cycle in the ISL6590 using sampled current data from each phase, ATR is performed with preset values and trips a comparator in a single ISL6580. The ISL6580 ATRH or ATRL signals immediately tell the PWM generator in the ISL6590 to enter the ATR mode. For this reason, the ATR mode is able to react much quicker than the sample rate derived AVP. PVID MAX=VID MIN PAVP NAVP ATRL ATRH ILOAD=MIN ILOAD=MAX FIGURE 3. ADAPTIVE VOLTAGE POSITIONING AND ACTIVE TRANSIENT RESPONSE TRIP LEVELS ISL6590 |
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