7

FN9003.3

February 11, 2005

Operation

Figure 1 shows a simplified diagram of the voltage regulation

and current control loops. Both voltage and current feedback

are used to precisely regulate voltage and tightly control

voltage loop comprises the error amplifier, comparators, gate

drivers and output MOSFETs. The error amplifier is

essentially connected as a voltage follower that has as an

input, the programmable reference DAC and an output that

is the CORE voltage.

Voltage Loop

to the inverting input of the error amplifier. This signal can

drive the error amplifier output either high or low, depending

upon the CORE voltage. Low CORE voltage makes the

amplifier output move towards a higher output voltage level.

Amplifier output voltage is applied to the positive inputs of

the comparators via the correction summing networks.

Out-of-phase sawtooth signals are applied to the two

comparators inverting inputs. Increasing error amplifier

voltage results in increased comparator output duty cycle.

This increased duty cycle signal is passed through the PWM

circuit with no phase reversal and on to the HIP6601, again

with no phase reversal for gate drive to the upper MOSFETs,

Q1 and Q3. Increased duty cycle or ON time for the

MOSFET transistors results in increased output voltage to

compensate for the low output voltage sensed.

Current Loop

The current control loop works in a similar fashion to the

voltage control loop, but with current control information

applied individually to each channel’s comparator. The

information used for this control is the voltage that is

Q4, when they are conducting. A single resistor converts and

scales the voltage across the MOSFETs to a current that is

applied to the current sensing circuit within the ISL6554.

Output from these sensing circuits is applied to the current

averaging circuit. Each PWM channel receives the

difference current signal from the summing circuit that

compares the average sensed current to the individual

channel current. When a power channel’s current is greater

than the average current, the signal applied via the summing

correction circuit to the comparator, reduces the output pulse

width of the comparator to compensate for the detected

“above average” current in that channel.

CURRENT

SENSING

COMPARATOR

PWM

CIRCUIT

+

+

CORRECTION

ERROR

AMPLIFIER

FB

REFERENCE

ISEN1

Q3

Q4

L2

PHASE

PWM1

DAC

ISL6554

HIP6601

-

Q1

Q2

L1

PHASE

HIP6601

CURRENT

SENSING

COMPARATOR

PWM

CIRCUIT

CORRECTION

PWM2

-

I AVERAGE

+

+

-

PROGRAMMABLE

ISEN2

-

CURRENT

AVERAGING

FIGURE 1. SIMPLIFIED BLOCK DIAGRAM OF THE ISL6554 VOLTAGE AND CURRENT CONTROL LOOPS FOR A TWO POWER

CHANNEL REGULATOR

∑

∑

∑

∑

+

-

+

-

+

-

ISL6554