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ISL6553 Datasheet(PDF) 11 Page - Intersil Corporation

Part No. ISL6553
Description  Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6553 Datasheet(HTML) 11 Page - Intersil Corporation

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11
With a high dv/dt load transient, typical of high performance
microprocessors, the largest deviations in output voltage
occur at the leading and trailing edges of the load transient. In
order to fully utilize the output-voltage tolerance range, the
output voltage is positioned in the upper half of the range
when the output is unloaded and in the lower half of the range
when the controller is under full load. This droop
compensation allows larger transient voltage deviations and
thus reduces the size and cost of the output filter components.
RIN should be selected to give the desired “droop” voltage at
the normal full load current 50
µA applied through the RISEN
resistor (or at a different full load current if adjusted as under
“Over-current, Selecting RISEN” above).
RIN = VDROOP / 50µA
For a VDROOP of 80mV, RIN = 1.6kΩ
The AC feedback components, RFB and Cc, are scaled in
relation to RIN.
Current Balancing
The detected currents are also used to balance the phase
currents.
Each phase’s current is compared to the average of the two
phase currents, and the difference is used to create an offset
in that phase’s PWM comparator. The offset is in a direction
to reduce the imbalance.
The balancing circuit can not make up for a difference in
rDS(ON) between synchronous rectifiers. If a FET has a
higher rDS(ON), the current through that phase will be
reduced.
Figures 8 and 9 show the inductor current of a two phase
system without and with current balancing.
Inductor Current
The inductor current in each phase of a multi-phase Buck
converter has two components. There is a current equal to
the load current divided by the number of phases (ILT / n),
and a sawtooth current, (iPK-PK) resulting from switching.
The sawtooth component is dependent on the size of the
inductors, the switching frequency of each phase, and the
values of the input and output voltage. Ignoring secondary
effects, such as series resistance, the peak to peak value of
the sawtooth current can be described by:
iPK-PK = (VIN x VCORE - VCORE
2) / (L x F
SW x VIN)
Where: VCORE = DC value of the output or VID voltage
VIN = DC value of the input or supply voltage
L = value of the inductor
FSW = switching frequency
Example: For VCORE = 1.6V,
VIN = 12V,
L = 1.3
µH,
FSW = 250kHz,
Then iPK-PK = 4.3A
The inductor, or load current, flows alternately from VIN
through Q1 and from ground through Q2. The ISL6553
samples the on-state voltage drop across each Q2 transistor
to indicate the inductor current in that phase. The voltage
drop is sampled 1/3 of a switching period, 1/FSW, after Q1 is
turned OFF and Q2 is turned on. Because of the sawtooth
current component, the sampled current is different from the
average current per phase. Neglecting secondary effects,
the sampled current (ISAMPLE) can be related to the load
current (ILT) by:
ISAMPLE = ILT /n+ (VINVCORE -3VCORE
2) / (6L x F
SW xVIN)
Where: ILT
= total load current
n = the number of channels
Example: Using the previously given conditions, and
For ILT = 50A,
n= 2
Then ISAMPLE = 25.49A
0
5
10
15
20
25
FIGURE 8. TWO CHANNEL multi-phase SYSTEM WITH
CURRENT BALANCING DISABLED
0
5
10
15
20
25
FIGURE 9. TWO CHANNEL multi-phase SYSTEM WITH
CURRENT BALANCING ENABLED
ISL6553


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