2

FN9030.7

March 4, 2005

Typical Application

Block Diagram

Ordering Information

PART NUMBER

TEMP.

RANGE (°C)

PACKAGE

PKG.

DWG. #

ISL6522CB

0 to 70

14 Ld SOIC

M14.15

ISL6522CBZ (Note)

0 to 70

14 Ld SOIC (Pb-free) M14.15

ISL6522CBZA

(Note)

0 to 70

14 Ld SOIC (Pb-free) M14.15

ISL6522IB

-40 to 85

14 Ld SOIC

M14.15

ISL6522IBZ (Note)

-40 to 85

14 Ld SOIC (Pb-free) M14.15

ISL6522CV

0 to 70

14 Ld TSSOP

M14.173

ISL6522CVZ

(Note)

0 to 70

14 Ld TSSOP

(Pb-free)

M14.173

ISL6522IV

-40 to 85

14 Ld TSSOP

M14.173

ISL6522IVZ (Note)

-40 to 85

14 Ld TSSOP

(Pb-free)

M14.173

ISL6522CR

0 to 70

16 Ld 5x5 QFN

L16.5x5B

ISL6522CRZ

(Note)

0 to 70

16 Ld 5x5 QFN

(Pb-free)

L16.5x5B

ISL6522IR

-40 to 85

16 Ld 5x5 QFN

L16.5x5B

ISL6522IRZ (Note)

-40 to 85

16 Ld 5x5 QFN

(Pb-free)

L16.5x5B

NOTE: Intersil Pb-free products employ special Pb-free material sets;

molding compounds/die attach materials and 100% matte tin plate

termination finish, which are RoHS compliant and compatible with

both SnPb and Pb-free soldering operations. Intersil Pb-free products

are MSL classified at Pb-free peak reflow temperatures that meet or

exceed the Pb-free requirements of IPC/JEDEC J STD-020C.

Add “-T” for tape and reel.

PART NUMBER

TEMP.

RANGE (°C)

PACKAGE

PKG.

DWG. #

12V

PGND

ISL6522

RT

FB

COMP

SS

GND

OSC

LGATE

UGATE

OCSET

PHASE

BOOT

EN

+5V OR +12V

MONITOR AND

PROTECTION

REF

+

-

+

-

OSCILLATOR

SOFT-

START

POWER-ON

RESET (POR)

INHIBIT

PWM

COMPARATOR

ERROR

AMP

VCC

SS

PWM

RT

GND

OCSET

FB

COMP

EN

OVER

CURRENT

GATE

CONTROL

LOGIC

BOOT

UGATE

LGATE

PHASE

PGND

200

µA

10

µA

4V

REFERENCE

+

-

+

-

+

-

ISL6522