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ISL6522IV Datasheet(PDF) 7 Page - Intersil Corporation

Part # ISL6522IV
Description  Buck and Synchronous Rectifier Pulse-Width Modulator (PWM) Controller
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6522IV Datasheet(HTML) 7 Page - Intersil Corporation

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7
FN9030.7
March 4, 2005
maximum voltage rating of the ISL6522 may be exceeded and
the IC will experience a catastrophic failure and the converter
will no longer be operational. Ensuring that there is a path for
the current to follow other than the capacitance on the rail will
prevent these failure modes.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
possible using ground plane construction or single point
grounding.
Figure 5 shows the critical power components of the
converter. To minimize the voltage overshoot the
interconnecting wires indicated by heavy lines should be part
of ground or power plane in a printed circuit board. The
components shown in Figure 6 should be located as close
together as possible. Please note that the capacitors CIN
and CO each represent numerous physical capacitors.
Locate the ISL6522 within three inches of the MOSFETs, Q1
and Q2. The circuit traces for the MOSFETs’ gate and
source connections from the ISL6522 must be sized to
handle up to 1A peak current.
Figure 6 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Minimize any leakage
current paths on the SS PIN and locate the capacitor, CSS
close to the SS pin because the internal current source is
only 10
µA. Provide local VCC decoupling between VCC and
GND pins. Locate the capacitor, CBOOT as close as practical
to the BOOT and PHASE pins.
Feedback Compensation
Figure 7 highlights the voltage-mode control loop for a
synchronous rectified buck converter. The output voltage
(VOUT) is regulated to the reference voltage level. The error
amplifier (error amp) output (VE/A) is compared with the
oscillator (OSC) triangular wave to provide a pulse-width
modulated (PWM) wave with an amplitude of VIN at the
PHASE node. The PWM wave is smoothed by the output filter
(LO and CO).
The modulator transfer function is the small-signal transfer
function of VOUT/VE/A. This function is dominated by a DC
gain and the output filter (LO and CO), with a double pole
break frequency at FLC and a zero at FESR. The DC gain of
the modulator is simply the input voltage (VIN) divided by the
peak-to-peak oscillator voltage
∆VOSC.
PGND
LO
CO
LGATE
UGATE
PHASE
Q1
Q2
D2
FIGURE 5. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
VIN
VOUT
RETURN
ISL6522
CIN
FIGURE 6. PRINTED CIRCUIT BOARD SMALL SIGNAL
LAYOUT GUIDELINES
+12V
ISL6522
SS
GND
VCC
BOOT
D1
LO
CO
VOUT
Q1
Q2
PHASE
+VIN
CBOOT
CVCC
CSS
ISL6522


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