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ISL6127IRZA Datasheet(PDF) 4 Page - Intersil Corporation |
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ISL6127IRZA Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 16 page 4 FN9005.4 June 10, 2005 Absolute Maximum Ratings Thermal Information VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.0V GATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+6V ISL6125 LOGIC OUT. . . . . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V UVLO, ENABLE, ENABLE#, SYSRST# . . . . . . -0.3V to VDD +0.3V RESET#, DLY_ON, DLYOFF. . . . . . . . . . . . . . . -0.3V to VDD +0.3V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5kV (HBM) Operating Conditions VDD Supply Voltage Range . . . . . . . . . . . . . . . . . . . . +1.5V to +5.5V Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C Thermal Resistance (Typical, Notes 1, 2) θJA (°C/W) θJC (°C/W) 4 x 4 QFN Package . . . . . . . . . . . . . . . 48 9 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C (QFN - Leads Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. 3. All voltages are relative to GND, unless otherwise specified. Electrical Specifications VDD = 1.5V to +5V, TA = TJ = -40°C - 85°C, Unless Otherwise Specified. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT UVLO Undervoltage Lockout Threshold VUVLOvth TJ = +25°C 619 633 647 mV Undervoltage Lockout Threshold Temp Co TCUVLOvth TJ = -40°C to 85°C - 40 - nV/°C Undervoltage Lockout Hysteresis VUVLOhys -10 - mV Undervoltage Lockout Threshold Range RUVLOvth Max VUVLOvth- Min VUVLOvth -7 - mV Undervoltage Lockout Delay TUVLOdel ENABLE satisfied - 10 - ms Transient Filter Duration TFIL VDD, UVLO, ENABLE glitch filter - 30 - µs DELAY ON/OFF Delay Charging Current DLY_ichg VDLY = 0V 0.92 1 1.08 µA Delay Charging Current Range DLY_ichg_r DLY_ichg(max) - DLY_ichg(min) - 0.08 - µA Delay Charging Current Temp. Coeff. TC_DLY_ichg - 0.2 - nA/°C Delay Threshold Voltage DLY_Vth 1.238 1.266 1.294 V Delay Threshold Voltage Temp. Coeff. TC_DLY_Vth - 0.2 - mV/°C ENABLE/ENABLE#, RESET# & SYSRST# I/O ENABLE Threshold VENh -1.2 - V ENABLE# Threshold VENh -0.5 VDD -V ENABLE/ENABLE# Hysteresis VENh -VENl Measured at VDD = 1.5V - 0.2 - V ENABLE/ENABLE# Lockout Delay TdelEN_LO UVLO satisfied - 10 - ms RESET# Pull-Down Current IRSTpd RST = 0.1V - 13 - mA RESET# Delay after GATE High TRSTdel GATE = VDD+5V - 160 - ms RESET# Output Low VRSTl Measured at VDD = 5V with 5K pullup resistors - - 0.001 V SYSRST# Low to GATE Turn-off TdelSYS_G GATE = 80% of VDD+5V - 40 - ns GATE GATE Turn-On Current IGATEon GATE = 0V 0.8 1.1 1.4 µA GATE Turn-Off Current IGATEoff_l GATE = VDD, Disabled -1.4 -1.05 -0.8 µA ISL6123, ISL6124, ISL6125, ISL6126, ISL6127, ISL6128 |
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