3

Simplified Power System Diagram

Functional Pin Descriptions

VID4 (Pin 1), VID3 (Pin 2), VID2 (Pin 3), VID1 (Pin 4)

and VID0 (Pin 5)

Voltage Identification inputs from microprocessor. These pins

respond to TTL and 3.3V logic signals. The ISL6223 decodes

VID bits to establish the output voltage. See Table 1.

COMP (Pin 6)

Output of the internal error amplifier. Connect this pin to the

external feedback and compensation network.

FB (Pin 7)

Inverting input of the internal error amplifier.

FS/DIS (Pin 8)

this pin to ground sets the switching frequency of the

converter. Pulling this pin to ground disables the converter

and three states the PWM outputs. See Figure 11.

GND (Pin 9)

Bias and reference ground. All signals are referenced to this

pin.

VSEN (Pin 10)

Power good monitor input. Connect to the microprocessor-

CORE voltage.

DACOUT (Pin 11)

The DAC output. Connect a capacitor to this pin slows down

the transition of the DAC output that is also the reference

voltage to the error amplifier.

NC (Pin 12, Pin 17, Pin 18)

No connection.

ISEN2 (Pin 13) and ISEN1 (Pin 16)

Current sense inputs from the individual converter channel’s

phase nodes.

PWM2 (Pin 14) and PWM1 (Pin 15)

PWM outputs for each driven channel in use. Connect these

pins to the PWM input of a HIP6601/2/3 driver.

PGOOD (Pin 19)

Power good. This pin provides an open-drain logic-high

signal when the microprocessor CORE voltage (VSEN pin)

is within specified limits and Soft-Start has timed out.

Bias supply. Connect this pin to a 5V supply.

SYNCHRONOUS

ISL6223

MICROPROCESSOR

VSEN

VID

RECTIFIED BUCK

CHANNEL

SYNCHRONOUS

RECTIFIED BUCK

CHANNEL

PWM 1

PWM 2

11

12

13

14

15

16

17

18

20

19

10

9

8

7

6

5

4

3

2

1

VID4

VID3

VID2

VID1

VID0

FS/DIS

PWM2

PGOOD

DACOUT

NC

ISEN1

GND

NC

FB

NC

VSEN

COMP

PWM1

ISEN2

ISL6223