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ISL6219A Datasheet(PDF) 13 Page - Intersil Corporation

Part No. ISL6219A
Description  Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications
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Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
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ISL6219A Datasheet(HTML) 13 Page - Intersil Corporation

 
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13
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 9, 10, 11 and 12. Since the power equations
depend on MOSFET parameters, choosing the correct
MOSFETs can be an iterative process that involves
repetitively solving the loss equations for different MOSFETs
and different switching frequencies until converging upon the
best solution.
Current Sensing
Pins 23, 20 and 19 are the ISEN pins denoted ISEN1, ISEN2
and ISEN3 respectively. The resistors connected between
these pins and the phase nodes determine the gains in the
load-line regulation loop and the channel-current balance
loop. Select the values for these resistors based on the room
temperature rDS(ON) of the lower MOSFETs; the full-load
operating current, IFL; and the number of phases, N
according to Equation 13 (see also Figure 4).
In certain circumstances, it may be necessary to adjust the
value of one or more of the ISEN resistors. This can arise
when the components of one or more channels are inhibited
from dissipating their heat so that the affected channels run
hotter than desired (see the section entitled Channel-Current
Balance). In these cases, chose new, smaller values of RISEN
for the affected phases. Choose RISEN,2 in proportion to the
desired decrease in temperature rise in order to cause
proportionally less current to flow in the hotter phase.
In Equation 14, make sure that
∆T2 is the desired temperature
rise above the ambient temperature, and
∆T1 is the measured
temperature rise above the ambient temperature. While a
single adjustment according to Equation 14 is usually
sufficient, it may occasionally be necessary to adjust RISEN
two or more times to achieve perfect thermal balance
between all channels.
Load-Line Regulation Resistor
The load-line regulation resistor is labeled RFB in Figure 7.
Its value depends on the desired full-load droop voltage
(VDROOP in Figure 7). If Equation 13 is used to select each
ISEN resistor, the load-line regulation resistor is as shown
in Equation 15.
If one or more of the ISEN resistors was adjusted for thermal
balance as in Equation 14, the load-line regulation resistor
should be selected according to Equation16 where IFL is the
full-load operating current and RISEN(n) is the ISEN resistor
connected to the nth ISEN pin.
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATING A LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter L-C resonant frequency split with
the introduction of current information into the control loop.
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, RC and CC.
Since the system poles and zero are effected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
The feedback resistor, RFB, has already been chosen as out-
lined in Load-Line Regulation Resistor. Select a target band-
width for the compensated system, f0. The target bandwidth
must be large enough to assure adequate transient perfor-
mance, but smaller than 1/3 of the per-channel switching fre-
quency. The values of the compensation components
depend on the relationships of f0 to the L-C pole frequency
and the ESR zero frequency. For each of the three cases
R
ISEN
r
DS ON
()
50 10 6
×
-----------------------
I
FL
N
--------
=
(EQ. 13)
R
ISEN 2
,
R
ISEN
∆T
2
∆T
1
----------
=
(EQ. 14)
R
FB
V
DROOP
50 10
6
×
-------------------------
=
(EQ. 15)
R
FB
V
DROOP
I
FL rDS ON
()
--------------------------------
R
ISEN n
()
n
=
(EQ. 16)
FIGURE 11. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6219A CIRCUIT
COMP
CC
RC
RFB
FB
VSEN
-
+
VDROOP
C2 (OPTIONAL)
ISL6219A


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