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ADN2816 Datasheet(PDF) 4 Page - Analog Devices |
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ADN2816 Datasheet(HTML) 4 Page - Analog Devices |
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4 / 24 page 
ADN2816 Data Sheet Rev. C | Page 4 of 24 JITTER SPECIFICATIONS TA = TMIN to TMAX, VCC = VMIN to VMAX, VEE = 0 V, CF = 0.47 µF, SLICEP = SLICEN = VEE, input data pattern: PRBS 223 − 1, unless otherwise noted. Table 2. Parameter Conditions Min Typ Max Unit PHASE-LOCKED LOOP CHARACTERISTICS Jitter Transfer BW OC-12 75 130 kHz OC-3 26 42 kHz Jitter Peaking OC-12 0 0.03 dB OC-3 0 0.03 dB Jitter Generation OC-12, 12 kHz to 5 MHz 0.001 0.003 UI rms 0.011 0.026 UI p-p OC-3, 12 kHz to 1.3 MHz 0.001 0.002 UI rms 0.005 0.010 UI p-p Jitter Tolerance OC-12, 223 − 1 PRBS 30 Hz1 100 UI p-p 300 Hz1 44 UI p-p 25 kHz 2.5 UI p-p 250 kHz1 1.0 UI p-p OC-3, 223 − 1 PRBS 30 Hz1 50 UI p-p 300 Hz1 24 UI p-p 6500 Hz 3.5 UI p-p 65 kHz1 1.0 UI p-p 1 Jitter tolerance of the ADN2816 at these jitter frequencies is better than what the test equipment is able to measure. |
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