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ADM8696 Datasheet(PDF) 9 Page - Analog Devices |
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ADM8696 Datasheet(HTML) 9 Page - Analog Devices |
9 / 13 page ADM8696/ADM8697 –9– APPLICATIONS INFORMATION Increasing the Drive Current (ADM8696) If the continuous output current requirements at VOUT exceeds 100 mA or if a lower VCC–VOUT voltage differential is desired, an external PNP pass transistor may be connected in parallel with the internal transistor. The BATT ON output (ADM8696) can directly drive the base of the external transistor. BATTERY +5V INPUT POWER 0.1µF PNP TRANSISTOR 0.1µF VOUT VCC BATT ON VBATT ADM8696 Figure 14. Increasing the Drive Current Using a Rechargeable Battery for Backup (ADM8696) If a capacitor or a rechargeable battery is used for backup, the charging resistor should be connected to VOUT since this elimi- nates the discharge path that would exist during power-down if the resistor is connected to VCC. VOUT VCC RECHARGABLE BATTERY +5V INPUT POWER 0.1µF 0.1µF VBATT ADM8696 R R VOUT – VBATT I = Figure 15. Rechargeable Battery Adding Hysteresis to the Power Fail Comparator For increased noise immunity, hysteresis may be added to the power fail comparator. Since the comparator circuit is nonin- verting, hysteresis can be added by connecting a resistor be- tween the PFO output and the PFI input as shown in Fig- ure 16. When PFO is low, resistor R3 sinks current from the summing junction at the PFI pin. When PFO is high, the series combination of R3 and R4 source current into the PFI summing junction. This results in differing trip levels for the comparator. Alternate Watchdog Input Drive Circuits The watchdog feature can be enabled and disabled under pro- gram control by driving WDI with a three-state buffer (Figure 17a). When three-stated, the WDI input will float, thereby dis- abling the watchdog timer. This circuit is not entirely foolproof and it is possible a software fault could erroneously three-state the buffer. This would pre- vent the ADM869x from detecting that the microprocessor is no longer operating correctly. In most cases, a better method is to ADM869x R2 1.3V R1 PFO 7805 R4 R3 +7V TO +15V INPUT POWER +5V PFI VCC TO µP NMI VH = 1.3V (1+ ––– + ––– ) VL = 1.3V (1+ ––– – ––––––––––––– ) ASSUMING R4 < < R3 THEN HYSTERESIS VH – VL = 5V (––– ) R1 R2 R1 R3 R1 R2 R1 R2 R1 (5V – 1.3V) 1.3V (R3 + R4) Figure 16. Adding Hysteresis to the Power Fail Comparator extend the watchdog period rather than disabling the watchdog. This may be done under program control using the circuit shown in Figure 17b. When the control input is high, the OSC SEL pin is low and the watchdog timeout is set by the external capacitor. A 0.01 µF capacitor sets a watchdog timeout delay of 100 s. When the control input is low, the OSC SEL pin is driven high, selecting the internal oscillator. The 100 ms or the 1.6 s period is chosen, depending on which diode in Fig- ure 17b is used. With D1 inserted, the internal timeout is set at 100 ms while with D2 inserted the timeout is set at 1.6 s. WDI ADM869x WATCHDOG STROBE CONTROL INPUT Figure 17a. Programming the Watchdog Input OSC IN OSC SEL ADM869x CONTROL INPUT* D1 D2 *LOW = INTERNAL TIMEOUT HIGH = EXTERNAL TIMEOUT Figure 17b. Programming the Watchdog Input REV. A |
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Similar Description - ADM8696_15 |
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