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ADM4850 Datasheet(PDF) 14 Page - Analog Devices

Part No. ADM4850
Description  5 V, Slew-Rate Limited, Half-Duplex and Full-Duplex RS-485/RS-422 Transceivers
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com

ADM4850 Datasheet(HTML) 14 Page - Analog Devices

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Rev. D | Page 14 of 16
The input impedance of the ADM4850/ADM4851/ADM4852/
ADM4853/ADM4854/ADM4855/ADM4856/ADM4857 receivers
is 96 kΩ, which is eight times higher than the standard RS-485
unit load of 12 kΩ. This 96 kΩ impedance enables a standard
driver to drive 32 unit loads or to be connected to 256 ADM4850/
ADM4856/ADM4857 receivers. An RS-485 bus, driven by a
single standard driver, can be connected to a combination of
ADM4855/ADM4856/ADM4857 devices and standard unit
load receivers, up to an equivalent of 32 standard unit loads.
The half-duplex parts (ADM4850/ADM4851/ADM4852/
ADM4853) have a driver enable (DE) pin that enables the
driver outputs when taken high, or puts the driver outputs
into a high impedance state when taken low. Similarly, the
half-duplex devices have an active low receiver enable (RE) pin.
Taking this pin low enables the receiver, whereas taking it high
puts the receiver outputs into a high impedance state. This
allows several driver outputs to be connected to an RS-485 bus.
Note that only one driver should be enabled at a time, but that
many receivers can be enabled.
The ADM4850/ADM4851/ADM4852/ADM4853 have a low
power shutdown mode, which is enabled by taking RE high and
DE low. If shutdown mode is not used, the fact that DE is active
high and RE is active low offers a convenient way of switching the
device between transmit and receive by tying DE and RE together.
If DE is driven low and RE is driven high for less than 50 ns,
the devices are guaranteed not to enter shutdown mode. If DE
is driven low and RE is driven high for at least 3000 ns, the
devices are guaranteed to enter shutdown mode.
The ADM4850/ADM4851/ADM4852/ADM4853/ADM4854/
ADM4855/ADM4856/ADM4857 offer true fail-safe operation
while remaining fully compliant with the ±200 mV EIA/TIA-485
standard. A logic high receiver output is generated when the
receiver inputs are shorted together or open circuit, or when
they are connected to a terminated transmission line with all
drivers disabled. This is done by setting the receiver threshold
between −30 mV and −200 mV. If the differential receiver input
voltage (A − B) is greater than or equal to −30 mV, RO is logic
high. If (A − B) is less than or equal to −200 mV, RO is logic low.
In the case of a terminated bus with all transmitters disabled,
the differential input voltage of the receiver is pulled to 0 V by
the internal circuitry of the ADM4850/ADM4851/ADM4852/
ADM4853/ADM4854/ADM4855/ADM4856/ADM4857, which
results in a logic high with 30 mV minimum noise margin.
The ADM4850/ADM4851/ADM4852/ADM4853/ADM4854/
ADM4855/ADM4856/ADM4857 incorporate two protection
mechanisms to guard the drivers against short circuits, bus con-
tention, or other fault conditions. The first is a current limiting
output stage, which protects the driver against short circuits over
the entire common-mode voltage range by limiting the output
current to approximately 70 mA. Under extreme fault conditions
where the current limit is not effective, a thermal shutdown circuit
puts the driver outputs into a high impedance state if the die
temperature exceeds 150°C, and does not turn them back on
until the temperature falls to 130°C.

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