10

Digital Section

Two levels of input buffer registers allow loading of data from

four operations: 1) load the LS-buffer register with the data

contents of the MS and LS-buffer registers and 4) load the

DAC register directly from the data input pins (See Table 1).

The CS and WR pins must be low to allow data transfers to

low) the registers are transparent, and the data input pins

control the DAC output directly. The other modes of opera-

tion allow double buffered loading of the DAC from an 8-bit

bus.

These input data pins are also used to program the PROM

under control of the PROG pin. This is done in manufactur-

ing, and for normal operation the PROG pin should be tied to

V+ (+5V).

Applications

GENERAL RECOMMENDATIONS

Grounding

Careful consideration must be given to grounding in any

14-bit accuracy system. The current into the analog ground

point inside the chip varies significantly with the input code

value, and the inevitable resistances between this point and

any external connection pint can lead to significant voltage

drop errors. For this reason, two separate leads are brought

voltage on the internal current summing point, as shown in

Figure 7. Thus output signals should be referenced to the

circuits.

Operational Amplifier Selection

selection is critical, in particular low input bias current (less

than 2nA), low offset voltage (less than 25

µV) are advisable

if the highest accuracy is needed. Maintaining a low input

offset over a 0V to 10V range also requires that the output

effective input offset less than 25

µV).

The reference inverting amplifier used in the bipolar mode

circuit must also be selected carefully. If 14-bit accuracy is

desired without adjustment, low input bias current (less than

1nA), low offset voltage (less than 50

µV), and high gain

(greater than 400k) are recommended. If a fixed reference

voltage is used, the gain requirement can be relaxed. For

highest accuracy (better than 13-bits), and additional

op-amp may be needed to correct for IR drop on the Analog

be selected for low bias current (less than 2nA) and low

offset voltage (less than 50

µV).

The op-amp requirements can be readily met by use of an

ICL7650 chopper stabilized device. For faster setting time,

an HA26XX can be used with an ICL7650 providing

automatic offset null (see A053 applications note for details)

The output amplifier’s non-inverting input should be tied

limited use since the output impedance at the summing node

depends on the code being converted in an unpredictable

way. If gain adjustment is required, low tempco (approxi-

Power Supplies

The V+ (pin 25) power supply should have a low noise level,

and no transients exceeding 7 volts. Note that the absolute

maximum for digital input voltage is V+ +0.3V, therefore V+

must be applied before digital inputs are allowed to go high.

Unused digital inputs must be connected to GND or V+ for

proper operation.

Unipolar Binary Operation (ICL7134U)

The circuit configuration for unipolar mode operation

(ICL7134U) is shown in Figure 8. With positive and negative

multiplication. The “digital input code/analog output value”

table for unipolar mode is given in Table 2. The Schottky

TABLE 1. DATA LOADING CONTROLS

CONTROL I/P

ICL7134 OPERATION

CS

WR

X

X

X

1

No Operation, Device Not Selected.

XX

1

X

0

0

0

0

Load All Registers from Data Bus.

0

1

0

0

Load LS Register from Data Bus.

1

0

0

0

Load MS Register from Data Bus.

1

1

0

0

Load DAC Register from MS and LS

Register.

NOTE: Data is latched on LO-HI transition of either WR or CS.

FIGURE 7. GROUND CONNECTIONS

ICL7134