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PS8551AL4-V Datasheet(PDF) 5 Page - Renesas Technology Corp |
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PS8551AL4-V Datasheet(HTML) 5 Page - Renesas Technology Corp |
5 / 20 page PS8551AL4 Chapter Title R08DS0123EJ0100 Rev.1.00 Page 5 of 18 Jun 27, 2014 ELECTRICAL CHARACTERISTICS (DC Characteristics) (TYP.: TA = 25 °C, VIN+ = VIN− = 0 V, VDD1 = VDD2 = 5 V, MIN., MAX.: refer to RECOMMENDED OPERATING CONDITIONS, unless otherwise specified) Parameter Symbol Conditions MIN. TYP. MAX. Unit Input Offset Voltage Vos TA = 25 °C −2 −0.25 2 mV −3 −0.25 3 Input Offset Voltage Drift vs. Temperature ⏐dVos/dTA⏐ 1.6 10 μV/°C Gain *1 G −200 mV ≤ VIN+ ≤ 200 mV, TA = 25 °C 7.92 8 8.08 V/V Gain Drift vs. Temperature ⏐dG/dTA⏐ 0.0006 V/V °C VOUT Non-linearity (200 mV) *2 NL200 −200 mV ≤ VIN+ ≤ 200 mV 0.014 0.35 % VOUT Non-linearity (200 mV) Drift vs. Temperature ⏐dNL200/dTA⏐ 0.0001 %/ °C VOUT Non-linearity (100 mV) *2 NL100 −100 mV ≤ VIN+ ≤ 100 mV 0.011 0.2 % Maximum Input Voltage before VOUT Clipping ⏐VIN+⏐MAX. 320 mV Input Supply Current IDD1 VIN+ = 400 mV 13.5 16 mA Output Supply Current IDD2 VIN+ = −400 mV 7.8 16 mA Input Bias Current IIN+ VIN+ = 0V −1 −0.65 1 μA Input Bias Current Drift vs. Temperature ⏐dIIN+/dTA⏐ 0.3 nA/ °C Low Level Saturated Output Voltage VOL VIN+ = −400 mV 1.29 V High Level Saturated Output Voltage VOH VIN+ = 400 mV 3.8 V Output Voltage (VIN+ = VIN− = 0 V) VOCM VIN+ = VIN− = 0 V 2.2 2.55 2.8 V Output Short-circuit Current ⏐IOSC⏐ 20 mA Equivalent Input Resistance RIN 450 k Ω VOUT Output Resistance ROUT 4 Ω Input DC Common-Mode Rejection Ratio *3 CMRRIN 76 dB *1 The differential output voltage (VOUT+ − VOUT−) with respect to the differential input voltage (VIN+ − VIN−), where VIN+ = −200 mV to 200 mV and VIN− = 0 V) is measured under the circuit shown in Fig. 2 NL200, G Test Circuit. Upon the resulting chart, the gain is defined as the slope of the optimum line obtained by using the method of least squares. *2 The differential output voltage (VOUT+ − VOUT−) with respect to the differential input voltage (VIN+ − VIN−) is measured under the circuit shown in Fig. 2 NL200, G Test Circuit. Upon the resulting chart, the optimum line is obtained by using the method of least squares. Non-linearity is defined as the ratio (%) of the optimum line obtained by dividing [Half of the peak to peak value of the (residual) deviation] by [full-scale differential output voltage]. For example, if the differential output voltage is 3.2 V, and the peak to peak value of the (residual) deviation is 22.4 mV, while the input VIN+ is ±200 mV, the output non-linearity is obtained as follows: NL200 = 22.4/(2 × 3 200) = 0.35% *3 CMRRIN is defined as the ratio of the differential signal gain (when the differential signal is applied between the input pins) to the common-mode signal gain (when both input pins are connected and the signal is applied). This value is indicated in dB. |
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