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HSP50215EVAL Datasheet(PDF) 5 Page - Intersil Corporation |
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HSP50215EVAL Datasheet(HTML) 5 Page - Intersil Corporation |
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5 / 45 page  5 2. ___ If a FIR filter design software tool is desired, then downloading SERINADE from the Intersil Corpora- tion website into the target directory is recommend- ed. The web site is found at www.intersil.com and SERINADE is found under the Products column of the home page. Select Digital Signal Processing Products Listing menu item. Select the Develop- ment Tools menu item. Select the SERINADE menu item. Download of SERINADE can be done from this location. The software must be run from the new target directory established on the C drive. Verifying the Control Software and Board Installation 1. ___ On the PC, change the directory to the target direc- tory where the control software has been installed. 2. ___ Start the program by typing: HSP 50215 <Enter>. 3. ___ The MAIN MENU screen will appear. It will look like Figure 3. 4. ___ Select item (0) for board configuration and type <En- ter>. The BOARD INTERFACE MENU will appear as shown in Figure 4. Use the menu items to change the default board configuration to match the evaluation board interface, printer, FPGA addressing and oscil- lator frequency that you desire. Verify that these set- tings match the jumper configuration of your evaluation board. 5. ___ When you have completed making your modifications, select item (0) and type <Enter> to return to the MAIN MENU. 6. ___ Select Main Menu item (9) and type <Enter> to enter the Test Menu. The Test Menu is shown in Figure 5. 7. ___ Select Test Menu Item (6) and type <Enter> to enter the Test Board submenu. 8. ___ A screen appears that indicates the RAM Address/Da- ta Bus test results and the HSP50215 data bus test results. If all the items have passed the test, the board and software have been properly installed and you are ready to begin evaluation testing. Skip to step 12. If any test failed, proceed to step 9. 9. ___ If one of the tests shown on the screen for step 8 did not pass, then the board jumper configuration should be reviewed, as it is the most likely culprit. 10. ___ Next, the physical installation should be checked. 11. ___ If the board is properly installed, then a verify that no ISAbus card addressing contention exists. Steps 9, 10, AND 11 are the leading causes of board test fail- ure. +------------------------------------+ | HSP50215 EVALUATION BOARD SOFTWARE | +------------------------------------+ MAIN MENU (0) Board Configuration (1) Modulator Channel 1 Configuration (2) Modulator Channel 2 Configuration (3) Modulator Channel 3 Configuration (4) Modulator Channel 4 Configuration (5) Load Configuration File (6) Save Configuration File (7) Compute Registers (8) Configure Board (9) Test Menu (10) Exit ENTER SELECTION: = (C) Intersil Corporation 1997 Version 1.0 FIGURE 3. MAIN MENU +-------------------------------------+ | HSP50215 EVALUATION BOARD SOFTWARE | +------------------------------------+ BOARD INTERFACE MENU File Name ................ EXAMPLES\EX01QPSK (1) Interface ...................... ISA (2) ISA Base Address ............... 0x300 (3) Channel 1 FPGA Address ......... 0 (4) Channel 2 FPGA Address ......... 1 (5) Channel 3 FPGA Address ......... 2 (6) Channel 4 FPGA Address ......... 3 (7) Oscillator Freq ........... 50000000 Hz (0) Main Menu ENTER SELECTION: (C) Intersil Corporation 1997 Version 1.0 FIGURE 4. BOARD INTERFACE SUBMENU +------------------------------------+ | HSP50215 EVALUATION BOARD SOFTWARE | +------------------------------------+ TEST MENU File Name................... EXAMPLES\EX01QPSK (1) Reset Board (2) Write to Location While Reset (3) Read from Location While Reset (4) Write to Location While Running (5) Read from Location While Running (6) Test Board (0) Main Menu ENTER SELECTION: (C) Intersil Corporation 1997 Version 1.0 FIGURE 5. TEST SUBMENU HSP50215EVAL |
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