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HMPVIDEVALISA Datasheet(PDF) 5 Page - Intersil Corporation |
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HMPVIDEVALISA Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 43 page 5 Introduction The HMP8116 is designed to decode baseband composite or S-video NTSC and PAL signals, and convert them to either digital YCbCr or RGB data. In addition to performing the basic decoding operations, the HMP8116 includes hard- ware to decode different types of VBI data and to generate digital video patterns for a blue screen, black screen and full screen color bars. The digital PLLs are designed to synchronize to all NTSC and PAL standards. A chroma PLL is used to maintain chroma lock for demodulation of the color information; a line- locked PLL is used to maintain vertical spatial alignment. The PLLs are designed to maintain lock even in the event of VCR headswitches and multipath noise. The HMP8116 contains two 8-bit A/D converters and an I2C interface for programming internal registers External Video Processing Before a video signal can be digitized the decoder has some external processing considerations that need to be addressed. This section discusses those external aspects of the HMP8116. ANALOG VIDEO INPUTS The HMP8116 supports either three composite or two com- posite and one S-video input. Three analog video inputs (CVBS 1-3) are used to select which one of three composite video sources are to be decoded. To support S-video applications, the Y channel drives the CVBS 3 analog input, and the C channel drives the C analog input. The analog inputs must be AC-coupled to the video signals, as shown in the Applications section. ANTI-ALIASING FILTERS An external anti-alias filter is required to achieve optimum performance and prevent high frequency components from being aliased back into the video image. For the CVBS 1-3 inputs, a single filter is connected between the YOUT and YIN pins. For the C input, the antialiasing filter should be connected before the C input. A recommended fil- ter is shown in Figure 1. Digitization of Video Prior to A/D conversion, the video signal is DC restored and gained to generate known video levels into the digital process- ing logic. This process is addessed in the “AGC and DC Res- toration” section. After digitization, sample rate converters and a comb filter are used to perform color separation and demod- ulation. A/D CONVERSION Video data is sampled at the CLK2 frequency then pro- cessed by the input sample rate converter. The output levels of the ADC after AGC and DC restoration processing are: (M) NTSC (B, D, G, H, I, NC) (M, N) PAL PAL white 196 196 black 66 59 blank 56 59 sync 0 0 AGC AND DC RESTORATION The AGC amplifier attenuates or amplifies the analog video signal to ensure that the blank level generates code 56 or 59 depending on the video standard. The difference from the ideal blank level of 56 or 59 is used to control the amount of attenuation or gain of the analog video signal. DC restoration positions the video signal so that the sync tip generates a code 0. The internal timing windows for AGC and DC Restoration are show in Figure 3. INPUT SIGNAL DETECTION It is assumed there is no video input if a horizontal sync is not detected for 16 consecutive lines. When no video has been detected, nominal video timing is generated for the previously detected or programmed video standard. A maskable interrupt is included to flag when no video has been detected (bit 6 of the INTERRUPT MASK register 0FH) allowing for blue/black/color bar output modes to be enabled if desired. The vertical sync interrupt can be used in deter- mining when a video signal is present on the currently selected video mux input. Bit 0 of register 0FH is used to enable vertical sync interrupts. FIGURE 1. RECOMMENDED ANTI-ALIASING FILTER R1 332 R2 4.02K C2 82pF L1 8.2uH C1 33pF YOUT YIN FIGURE 2. AGC AND DC RESTORE INTERNAL TIMING VIDEO INPUT DC RESTORE AGC HMP8116 |
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