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HIP6301 Datasheet(PDF) 10 Page - Intersil Corporation

Part No. HIP6301
Description  Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HIP6301 Datasheet(HTML) 10 Page - Intersil Corporation

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10
destructive ringing of the capacitors and output inductors. If
the conditions that caused the over-voltage still persist, the
PWM outputs will be cycled between three state and VCORE
clamped to ground, as a hysteretic shunt regulator.
Under-Voltage
The VSEN pin also detects when the CORE voltage falls
more than 10% below the VID programmed level. This
causes PGOOD to go low, but has no other effect on
operation and is not latched. There is also hysteresis in this
detection point.
Over-Current
In the event of an over-current condition, the over-current
protection circuit reduces the average current delivered to
less than 25% of the current limit. When an over-current
condition is detected, the controller forces all PWM outputs
into a three state mode. This condition results in the gate
driver removing drive to the output stages.The HIP6301
goes into a wait delay timing cycle that is equal to the Soft-
Start ramp time. PGOOD also goes “low” during this time
due to VSEN going below its threshold voltage.To lower the
average output dissipation, the Soft-Start initial wait time is
increased from 32 to 2048 cycles, then the Soft-Start ramp is
initiated. At a PWM frequency of 200kHz, for instance, an
over-current detection would cause a dead time of 10.24ms,
then a ramp of 10.08ms.
At the end of the delay, PWM outputs are restarted and the
soft start ramp is initiated. If a short is present at that time,
the cycle is repeated. This is the hiccup mode.
Figure 6 shows the supply shorted under operation and the
hiccup operating mode described above. Note that due to
the high short circuit current, over-current is detected before
completion of the start-up sequence so the delay is not quite
as long as the normal Soft-Start cycle.
CORE Voltage Programming
The voltage identification pins (VID0, VID1, VID3, and VID4)
set the CORE output voltage. Each VID pin is pulled to VCC
by an internal 20
µA current source and accepts open-
collector/open-drain/open-switch-to-ground or standard low-
voltage TTL or CMOS signals.
Table 1 shows the nominal DAC voltage as a function of the
VID codes. The power supply system is
±1% accurate over
the operating temperature and voltage range.
PGOOD
SHORT
50A/Div
CURRENT
ATX SUPPLY ACTIVATED BY ATX “PS-ON PIN”
SUPPLY FREQUENCY = 200kHz, VIN = 12V
HICCUP MODE. SUPPLY POWERED BY ATX SUPPLY
CORE LOAD CURRENT = 31A, 5V LOAD = 5A
SHORT APPLIED HERE
FIGURE 6. SHORT APPLIED TO SUPPLY AFTER POWER-UP
TABLE 1. VOLTAGE IDENTIFICATION CODES
VID4
VID3
VID2
VID1
VID0
VDAC
11111
Off
11110
1.100
11101
1.125
11100
1.150
11011
1.175
11010
1.200
11001
1.225
11000
1.250
10111
1.275
10110
1.300
10101
1.325
10100
1.350
10011
1.375
10010
1.400
10001
1.425
10000
1.450
01111
1.475
01110
1.500
01101
1.525
01100
1.550
01011
1.575
01010
1.600
01001
1.625
01000
1.650
00111
1.675
00110
1.700
00101
1.725
00100
1.750
00011
1.775
00010
1.800
00001
1.825
00000
1.850
HIP6301
HIP6301


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