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HIP4020 Datasheet(PDF) 2 Page - Intersil Corporation

Part No. HIP4020
Description  Half Amp Full Bridge Power Driver for Small 3V, 5V and 12V DC Motors
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HIP4020 Datasheet(HTML) 2 Page - Intersil Corporation

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HIP4020
Absolute Maximum Ratings
Thermal Information
Supply Voltage; VDD to VSS or VSSA or VSSB . . . . . . . . . . . . . . +15V
Neg. Output Supply Voltage, (VSSA, VSSB). . . . . . . . . . . . . (Note 1)
DC Logic Input Voltage (Each Input) . . . (VSS -0.5V) to (VDD +0.5V)
DC Logic Input Current (Each Input)
. . . . . . . . . . . . . . . . . . . . .±15mA
ILF Fault Output Current
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±15mA
Output Load Current, (Self Limiting, See Elec. Spec.)
. . . . . ±I
O(LIMIT)
Operating Conditions TA = 25oC
Typical Operating Supply Voltage Range, VDD. . . . . . . . +3 to +12V
Low Voltage Logic Retention, Min. VDD . . . . . . . . . . . . . . . . . . . +2V
Idle Supply Current; No Load, VDD = +5V . . . . . . . . . . . . . . . 0.8mA
Typical P+N Channel rDS(ON), VDD = +5V, 0.5A Load . . . . . . . . . 2Ω
Thermal Resistance (Typical, Note 1)
θ
JA
Plastic SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . 105oC/W
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
TA = 25
oC, V
DD = +5V, VSSA = VSSB = VSS = 0V, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Input Leakage Current
ILEAK
VDD = +15V
-
-
25
nA
Low Level Input Voltage
VIL
VSS
-
0.8
V
High Level Input Voltage
VIH
2
-
VDD
V
ILF Output Low, Sink Current
IOH
VOUT = 0.4V, VDD = +12V
15
-
-
mA
ILF Output High, Source Current
IOL
VOUT = 11.6V, VDD = +12V
-
-
-15
mA
Input Capacitance
CIN
-
2-
pF
P-Channel rDS(ON), Low Supply Voltage
rDS(ON)
VDD = +3V, ISOURCE = 250mA
-
1.6
2.1
N-Channel rDS(ON), Low Supply Voltage
rDS(ON)
VDD = +3V, ISINK = 250mA
-
1
1.5
P-Channel rDS(ON), High Supply Voltage
rDS(ON)
VDD = +12V, ISOURCE = 400mA
-
0.6
1.2
N-Channel rDS(ON), High Supply Voltage
rDS(ON)
VDD = +12V, ISINK = 400mA
-
0.5
1.1
OUTA, OUTB Source Current Limiting
IO(LIMIT)
VDD = +6V, VSS = 0V, VSSA = VSSB = -6V
480
625
1500
mA
OUTA, OUTB Sink Current Limiting
-IO(LIMIT)
VDD = +6V, VSS = 0V, VSSA = VSSB = -6V
480
800
1500
mA
Idle Supply Current; No Load
IDD
-
0.8
1.5
mA
OUTA, OUTB Voltage High
VOH
ISOURCE = 450mA
4.2
4.5
-
V
OUTA, OUTB Voltage Low
VOL
ISINK = 450mA
-
0.4
0.6
V
OUTA, OUTB Voltage High
VOH
VDD = +3V, ISOURCE = 250mA
2.415
2.6
-
V
OUTA, OUTB Voltage Low
VOL
VDD = +3V, ISINK = 250mA
-
0.25
0.375
V
OUTA, OUTB Source Current Limiting
IO(LIMIT)
VDD = +12V
480
625
1500
mA
OUTA, OUTB Sink Current Limiting
-IO(LIMIT)
VDD = +12V
480
800
1500
mA
OUTA, OUTB Source Current Limiting
IO(LIMIT)
VDD = +3V
480
625
1500
mA
OUTA, OUTB Sink Current Limiting
-IO(LIMIT)
VDD = +3V
480
800
1500
mA
Thermal Shutdown
TSD
-
145
-
oC


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