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HI5630 Datasheet(PDF) 6 Page - Intersil Corporation

Part No. HI5630
Description  Triple 8-Bit, 80MSPS A/D Converter with Internal Voltage Reference
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HI5630 Datasheet(HTML) 6 Page - Intersil Corporation

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6
Over-Voltage Recovery
0.2V Overdrive
-
1
-
Cycle
Effective Number of Bits, ENOB
fIN = 1MHz (Figure 11)
-
7.6
-
Bits
Signal to Noise and Distortion Ratio, SINAD
fIN = 1MHz
-
47.8
-
dB
Signal to Noise Ratio, SNR
fIN = 1MHz (Figure 12)
-
47.9
-
dB
Total Harmonic Distortion, THD
fIN = 1MHz
-
- 63
-
dB
Spurious Free Dynamic Range, SFDR
fIN = 1MHz (Figure 13)
-
- 64
-
dB
Channel Crosstalk
-75-
dB
SAMPLING CLOCK INPUT Note 3
Input Logic High Voltage, VIH
Figure 10
-
4
-
V
Input Logic Low Voltage, VIL
Figure 10
-
0.4
-
V
Input Logic High Current, IIH
VIH = 4.5V
-10.0
-
+10.0
µA
Input Logic Low Current, IIL
VIL = 0V
-10.0
-
+10.0
µA
Input Capacitance, CIN
-7-
pF
CLOCK OUTPUT CL = 10pF (Note 3)
Output Logic High Voltage, VOH
IOH = 100µA
4.0
-
-
V
Output Logic Low Voltage, VOL
IOL = 100µA
-
-
0.8
V
Output Capacitance, CCOUT
-7-
pF
DIGITAL OUTPUTS CL = 10pF (Note 3)
Output Logic High Voltage, VOH
IOH = 100µA; DVDD = 5V
4.0
-
-
V
Output Logic Low Voltage, VOL
IOL = 100µA; DVDD = 5V
-
-
0.8
V
Output Capacitance, CDOUT
-7-
pF
TIMING CHARACTERISTICS
Data Latency, tLAT
For a Valid Sample
-
5
-
Cycles
Power-Up Initialization
Data Invalid Time
-
-
20
Cycles
Sample Clock Pulse Width (Low)
-
-
-
ns
Sample Clock Pulse Width (High)
-
-
-
ns
Sample Clock Duty Cycle Variation
Figure 9
-
±5-
%
POWER SUPPLY CHARACTERISTICS
Analog Supply Voltage, AVDD
4.75
5.0
5.25
V
Digital Supply Voltage, DVDD
4.75
5.0
5.25
V
Supply Current, ITOTAL
-
348
-
mA
Analog Current, IAVDD
-
235
265
mA
Digital5 Current, IDVDD
-
113
-
mA
Power Dissipation
-
1.74
-
W
Standby Current
-8-
mA
Standby Power
-40-
mW
Offset Error PSRR,
∆VOS
AVDD or DVDD = 5V ±5%
-
±0.4
-
LSB
Gain Error PSRR,
∆FSE
AVDD or DVDD = 5V ±5%
-
±0.15
-
LSB
NOTES:
2. Parameter guaranteed by design or characterization and not production tested.
3. With the clock low and DC input.
Electrical Specifications
AVDD = 5V, DVDD = 5V; Single Ended Inputs, VRIN = 2.5V; fS = 80MSPS at 50% Duty Cycle; CL = 10pF;
TA =25
oC; Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
HI5630


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