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AD73360 Datasheet(PDF) 20 Page - Analog Devices |
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AD73360 Datasheet(HTML) 20 Page - Analog Devices |
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20 / 35 page  REV. A AD73360 –20– Resetting the AD73360 The RESET pin resets all the control registers. All registers are reset to zero indicating that the default SCLK rate (DMCLK/8) and sample rate (DMCLK/2048) are at a minimum to ensure that slow speed DSP engines can communicate effectively. As well as resetting the control registers using the RESET pin, the device can be reset using the RESET bit (CRA:7) in Control Register A. Both hardware and software resets require four DMCLK cycles. On reset, DATA/ PGM (CRA:0) is set to 0 (default condition) thus enabling Program Mode. The reset conditions ensure that the device must be programmed to the correct settings after power-up or reset. Following a reset, the SDOFS will be asserted approximately 2070 master (MCLK) cycles after RESET goes high. The data that is output following the reset and during Program Mode is random and contains no valid information until either data or mixed mode is set. Power Management The individual functional blocks of the AD73360 can be en- abled separately by programming the power control register CRC. It allows certain sections to be powered down if not re- quired, which adds to the device’s flexibility in that the user need not incur the penalty of having to provide power for a certain section if it is not necessary to their design. The power control registers provide individual control settings for the major functional blocks on each analog front end unit and also a global override that allows all sections to be powered up/down by setting/clearing the bit. Using this method the user could, for example, individually enable a certain section, such as the refer- ence (CRC:5), and disable all others. The global power-up (CRC:0) can be used to enable all sections but if power-down is required using the global control, the reference will still be en- abled; in this case, because its individual bit is set. Refer to Table XII for details of the settings of CRC. CRD–CRF can be used to control the power status of individual channels allowing multiple channels to be powered down if required. Operating Modes There are three operating modes available on the AD73360. They are Program, Data and Mixed Program/Data. The device configuration—register settings—can be changed only in Pro- gram and Mixed Program/Data Modes. In all modes, transfers of information to or from the device occur in 16-bit packets, therefore the DSP engine’s SPORT will be programmed for 16- bit transfers. Program (Control) Mode In Program Mode, CRA:0 = 0, the user writes to the control registers to set up the device for desired operation—SPORT operation, cascade length, power management, input/output gain, etc. In this mode, the 16-bit information packet sent to the device by the DSP engine is interpreted as a control word whose format is shown in Table VI. In this mode, the user must ad- dress the device to be programmed using the address field of the control word. This field is read by the device and if it is zero (000 bin), the device recognizes the word as being addressed to it. If the address field is not zero, it is then decremented and the control word is passed out of the device—either to the next device in a cascade or back to the DSP engine. This 3-bit ad- dress format allows the user to uniquely address any one of up to eight devices in a cascade. If the AD73360 is used in a stand- alone configuration connected to a DSP, the device address corresponds to 0. If, on the other hand, the AD73360 is config- ured in a cascade of multiple devices, its device address corre- sponds with its hardwired position in the cascade. Following reset, when the SE pin is enabled, the AD73360 responds by raising the SDOFS pin to indicate that an output sample event has occurred. Control words can be written to the device to coincide with the data being sent out of the SPORT, as shown in Figure 12 (Directly Coupled), or they can lag the out- put words by a time interval that should not exceed the sample interval (Indirectly Coupled). Refer to the Digital Interface section for more information. After reset, output frame sync pulses will occur at a slower default sample rate, which is DM- CLK/2048, until Control Register B is programmed, after which the SDOFS will be pulsed at the selected rate. This is to allow slow controller devices to establish communication with the AD73360. During Program Mode, the data output by the de- vice is random and should not be interpreted as ADC data. Data Mode Once the device has been configured by programming the cor- rect settings to the various control registers, the device may exit Program Mode and enter Data Mode. This is done by program- ming the DATA/ PGM (CRA:0) bit to a 1 and MM (CRA:1) to 0. Once the device is in Data Mode, the input data is ignored. When the device is in normal Data Mode (i.e., mixed mode disabled), it must receive a hardware reset to reprogram any of the control register settings. Appendix C details the initialization and operation of an analog front end cascade in normal Data Mode. Mixed Program/Data Mode This mode allows the user to send control words to the device while receiving ADC words. This permits adaptive control of the device whereby control of the input gains can be affected by reprogramming the control registers. The standard data frame remains 16 bits, but now the MSB is used as a flag bit to indi- cate that the remaining 15 bits of the frame represents control information. Mixed mode is enabled by setting the MM bit (CRA:1) to 1 and the DATA/ PGM bit (CRA:0) to 1. In the case where control setting changes will be required during nor- mal operation, this mode allows the ability to load control infor- mation with the slight inconvenience of formatting the data. Note that the output samples from the ADC will also have the MSB set to zero to indicate it is a data word. A description of a single device operating in mixed mode is detailed in Appendix B, while Appendix D details the initializa- tion and operation of an analog front end cascade operating in mixed mode. Note that it is not essential to load the control registers in Program Mode before setting mixed mode active. Mixed mode may be selected with the first write by program- ming CRA and then transmitting other control words. |
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