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AD10678 Datasheet(PDF) 1 Page - Analog Devices |
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AD10678 Datasheet(HTML) 1 Page - Analog Devices |
1 / 20 page ![]() 16-Bit, 80 MSPS A/D Converter AD10678 Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. FEATURES 80 MSPS sample rate 80 dBFS signal-to-noise ratio Transformer-coupled analog input Single PECL clock source Digital outputs True binary format 3.3 V and 5 V CMOS-compatible APPLICATIONS Low signature radar Medical imaging Communications instrumentation Instrumentation Antenna array processing GENERAL DESCRIPTION The AD10678 is a 16-bit, high performance, analog-to-digital converter (ADC) for applications that demand increased SNR levels. Exceptional noise performance and a typical signal-to- noise ratio of 80 dBFS are obtained by digitally postprocessing the outputs of four ADCs. A single analog input and PECL sampling clock and 3.3 V and 5 V power supplies are required. The AD10678 is assembled using a 0.062-inch laminate board with three sets of connector interface pads to accommodate analog and digital isolation. Analog Devices recommends using the FSI-110-03-G-D-AD-K-TR connector from Samtec. The overall board fits a 2.2 inch × 2.8 inch PCB specified from 0°C to 70°C. FUNCTIONAL BLOCK DIAGRAM AD10678 ANALOG POWER CLOCK DISTRIBUTION CIRCUIT DIGITAL POWER ENCODE ENCODE OUTPUT DATA BITS AGND ADC ADC ADC ADC AGND DGND DGND 3.3VE 3.3V 5VA AIN AIN DOUT0 DOUT15 14 14 14 14 DRY DIGITAL POST- PROCES- SING Figure 1. PRODUCT HIGHLIGHTS 1. Guaranteed sample rate of 80 MSPS. 2. Input signal conditioning with optimized noise performance. 3. Fully tested and guaranteed performance. |
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